Add fifo memory size variable.

2019-11-22 00:49:32 +02:00
parent 07cfe9893d
commit 15dbd68ee2
4 changed files with 45 additions and 33 deletions
@@ -7,15 +7,15 @@
 // Dual-Port Block RAM with Two Write Ports
 // File: blobkram.v

-module blockram #( parameter
+module rams_tdp_rf_rf #( parameter
    DEPTH =  16,
    ADDR_WIDTH = 4, 
    DATA_WIDTH = 24 ) (clka,clkb,ena,enb,wea,web,addra,addrb,dia,dib,doa,dob);

 input                       clka,clkb,ena,enb,wea,web;
 input   [ADDR_WIDTH-1:0]    addra,addrb;
-input  signed [DATA_WIDTH-1:0]    dia,dib;
-output signed [DATA_WIDTH-1:0]    doa,dob;
+input   [DATA_WIDTH-1:0]    dia,dib;
+output  [DATA_WIDTH-1:0]    doa,dob;
 reg     [DATA_WIDTH-1:0]    ram     [ DEPTH - 1 :0];
 reg     [DATA_WIDTH-1:0]    doa,dob;