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Imants Pulkstenis
2019-11-12 23:43:53 +02:00
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MSP430F20xx_Code_Examples/Assembly_CCS/!Readme.txt
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File Name Description
----------------------------------------------------------------------------------------
msp430x20x1_ca_01.asm Comp_A, Output Reference Voltages on P1.1
msp430x20x1_ca_02.asm Comp_A, Detect Threshold, Set P1.0 if P1.1 > 0.25*Vcc
msp430x20x1_ca_03.asm Comp_A, Simple 2.2V Low Battery Detect
msp430x20x2_adc10_01.asm ADC10, Sample A0, Set P1.0 if A0 > 0.5*AVcc
msp430x20x2_adc10_02.asm ADC10, Sample A1, 1.5V Ref, Set P1.0 if A1 > 0.2V
msp430x20x2_adc10_03.asm ADC10, ADC10, Sample A10 Temp, Set P1.0 if Temp ++ ~2C
msp430x20x2_adc10_04.asm ADC10, ADC10, Sample A1, Signed, Set P1.0 if A1 > 0.5*AVcc
msp430x20x2_adc10_05.asm ADC10, ADC10, Sample A11, Lo_Batt, Set P1.0 if AVcc < 2.3V
msp430x20x2_adc10_06.asm ADC10, ADC10, Output Internal Vref on P1.4 & ADCCLK on P1.3
msp430x20x2_adc10_07.asm ADC10, DTC Sample A1 32x, AVcc, Repeat Single, DCO
msp430x20x2_adc10_08.asm ADC10, ADC10, DTC Sample A1 32x, 1.5V, Repeat Single, DCO
msp430x20x2_adc10_09.asm ADC10, ADC10, DTC Sample A10 32x, 1.5V, Repeat Single, DCO
msp430x20x2_adc10_10.asm ADC10, ADC10, DTC Sample A3-01, AVcc, Single Sequence, DCO
msp430x20x2_adc10_11.asm ADC10, ADC10, Sample A1, 1.5V, TA1 Trig, Set P1.0 if > 0.5V
msp430x20x2_adc10_12.asm ADC10, Sample A7, 1.5V, TA1 Trig, Ultra-Low Pwr
msp430x20x2_adc10_13.asm ADC10, DTC Sample A1 32x, AVcc, TA0 Trig, DCO
msp430x20x2_adc10_14.asm ADC10, DTC Sample A1-0 16x, AVcc, Repeat Seq, DCO
msp430x20x2_adc10_16.asm ADC10, ADC10, DTC Sample A0 -> TA1, AVcc, DCO
msp430x20x2_adc10_temp.asm ADC10, Sample A10 Temp and Convert to oC and oF
msp430x20x3_1.asm Software Toggle P1.0
msp430x20x3_1_vlo.asm Software Toggle P1.0, MCLK = VLO/8
msp430x20x3_clks.asm Basic Clock, Output Buffered SMCLK, ACLK and MCLK/10
msp430x20x3_flashwrite_01.asm Flash In-System Programming, Copy SegC to SegD
msp430x20x3_LFxtal_nmi.asm LFXT1 Oscillator Fault Detection
msp430x20x3_lpm3.asm Basic Clock, LPM3 Using WDT ISR, 32kHz ACLK
msp430x20x3_lpm3_vlo.asm Basic Clock, LPM3 Using WDT ISR, VLO ACLK
msp430x20x3_nmi.asm Basic Clock, Configure RST/NMI as NMI
msp430x20x3_P1_01.asm Software Poll P1.4, Set P1.0 if P1.4 = 1
msp430x20x3_P1_02.asm Software Port Interrupt on P1.4 from LPM4
msp430x20x3_P1_03.asm Poll P1 With Software with Internal Pull-up
msp430x20x3_P1_04.asm P1 Interrupt from LPM4 with Internal Pull-up
msp430x20x3_sd16A_01.asm SD16A, Sample A1+ Continuously, Set P1.0 if > 0.3V
msp430x20x3_sd16A_02.asm SD16, Using the Integrated Temperature Sensor
msp430x20x3_sd16A_03.asm SD16A takes a sample of a single sequence of channels
msp430x20x3_ta_01.asm Timer_A, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK
msp430x20x3_ta_02.asm Timer_A, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK
msp430x20x3_ta_03.asm Timer_A, Toggle P1.0, Overflow ISR, DCO SMCLK
msp430x20x3_ta_04.asm Timer_A, Toggle P1.0, Overflow ISR, 32kHz ACLK
msp430x20x3_ta_05.asm Timer_A, Toggle P1.0, CCR0 Up Mode ISR, 32kHz ACLK
msp430x20x3_ta_06.asm Timer_A, Toggle P1.0, CCR1 Cont. Mode ISR, DCO SMCLK
msp430x20x3_ta_07.asm Timer_A, Toggle P1.0-3, Cont. Mode ISR, DCO SMCLK
msp430x20x3_ta_08.asm Timer_A, Toggle P1.0-2, Cont. Mode ISR, 32kHz ACLK
msp430x20x3_ta_10.asm Timer_A, Toggle P1.1/TA0, Up Mode, DCO SMCLK
msp430x20x3_ta_11.asm Timer_A, Toggle P1.1/TA0, Up Mode, 32kHz ACLK
msp430x20x3_ta_13.asm Timer_A, Toggle P1.1/TA0, Up/Down Mode, DCO SMCLK
msp430x20x3_ta_14.asm Timer_A, Toggle P1.1/TA0, Up/Down Mode, 32kHz ACLK
msp430x20x3_ta_16.asm Timer_A, PWM TA1, Up Mode, DCO SMCLK
msp430x20x3_ta_17.asm Timer_A, PWM TA1, Up Mode, 32kHz ACLK
msp430x20x3_ta_19.asm Timer_A, PWM TA1, Up/Down Mode, DCO SMCLK
msp430x20x3_ta_20.asm Timer_A, PWM TA1-2, Up/Down Mode, 32kHz ACLK
msp430x20x3_ta_uart2400.asm Timer_A, Ultra-Low Pwr UART 2400 Echo, 32kHz ACLK
msp430x20x3_usi_01.asm USICNT Used as a One-Shot Timer Function, DCO SMCLK
msp430x20x3_usi_02.asm SPI full-Duplex 3-wire Master
msp430x20x3_usi_03.asm SPI full-Duplex 3-wire Slave
msp430x20x3_usi_04.asm USI SPI Interface to HC165/164 Shift Registers
msp430x20x3_usi_05.asm USI SPI Interface to TLC549 8-bit ADC
msp430x20x3_usi_06.asm USI I2C Master Receiver, single byte
msp430x20x3_usi_07.asm USI I2C Master Transmitter, single byte
msp430x20x3_usi_08.asm USI I2C Slave Receiver, single byte
msp430x20x3_usi_09.asm USI I2C Slave Transmitter, single byte
msp430x20x3_wdt_01.asm WDT, Toggle P1.0, Interval Overflow ISR, DCO SMCLK
msp430x20x3_wdt_02.asm WDT, Toggle P1.0, Interval Overflow ISR, 32kHz ACLK
msp430x20x3_wdt_04.asm WDT+ Failsafe Clock, DCO SMCLK
msp430x20x3_wdt_05.asm Reset on Invalid Address fetch, Toggle P1.0
msp430x20x3_wdt_06.asm WDT+ Failsafe Clock, 32kHz ACLK
msp430x20xx_dco_flashcal.asm DCO Calibration Constants Programmer
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x1_ca_01.asm
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x1 Demo - Comp_A, Output Reference Voltages on P1.1
;
; Description: Output comparator_A reference levels on P1.1. Program will
; cycle through the on-chip comparator_A reference voltages with output on
; P1.1. Normal mode is LPM0 with TA0 triggering interrupt for next mode.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20x1
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | CA1/P1.1|-->Vref
; | |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
mov.b #P2CA4,&CACTL2 ; CA1
SetupC0 mov.w #CCIE,&CCTL0 ; CCR0 interrupt enabled
SetupTA mov.w #TASSEL_2+ID_3+MC_2,&TACTL ; SMCLK/8, contmode
eint ; General enable interrupts
;
Mainloop clr.b &CACTL1 ; No reference voltage
bis.w #CPUOFF,SR ; CPU off
Ref1 mov.b #CAREF0+CAON,&CACTL1 ; 0.25*Vcc, Comp. on
bis.w #CPUOFF,SR ; CPU off
Ref2 mov.b #CAREF1+CAON,&CACTL1 ; 0.5*Vcc, Comp. on
bis.w #CPUOFF,SR ; CPU off
Ref3 mov.b #CAREF1+CAREF0+CAON,&CACTL1 ; 0.55V on P2.3, Comp. on
bis.w #CPUOFF,SR ; CPU off
jmp Mainloop ;
;-------------------------------------------------------------------------------
TA0_ISR; Exit LPM0
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on RETI
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; TimerA0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x1_ca_02.asm
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x1 Demo - Comp_A, Detect Threshold, Set P1.0 if P1.1 > 0.25*Vcc
;
; Description: Use comparator_A to detect a voltage threshold. Using an
; external potentiometer, an unknown analog voltage is applied to P1.1.
; Comparator_A compares the unknown voltage to an internal reference
; voltage, in this example 0.25*VCC. If the interesting voltage is higher
; than 0.25*Vcc, P1.0 is set, if not, P1.0 is reset.
; ACLK = n/a, MCLK = SMCLK = default
;
; MSP430F20x1
; -----------------
; /|\ | XIN|-
; | | |
; ---|RST XOUT|-
; | | |
; R<-|P1.1/CA1 P1.0|--> LED
; | | |
; ---|VSS
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 = output
mov.b #CARSEL+CAREF0+CAON,&CACTL1 ; 0.25Vcc = -comp, on
mov.b #P2CA4,&CACTL2 ; P1.1/CA1 = +comp
;
Mainloop bit.b #CAOUT,&CACTL2 ; Test comparator_A output
jz OFF ; jmp--> if CAOUT reset
;
ON bis.b #001h,&P1OUT ; P1.0 = 1
jmp Mainloop ;
OFF bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x1_ca_03.asm
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x1 Demo - Comp_A, Simple 2.2V Low Battery Detect
;
; Description: Two comparator_A reference generators 0.25*Vcc and ~ 0.55V
; are compared for a simple battery check of 2.2V. In the subroutine
; Batt_Check a small capacitor that must be added to P2.3 is first charged
; to 0.25*Vcc and then compared to ~ 0.55V. If 0.25*Vcc,
; is above ~0.55V, P1.0 is toggled, else set. Batt_Check is
; called constantly in an endless loop - in an actual application,
; Batt_Check should be called very infrequently to save power.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; There is a tolerence of the Comp_A reference generator and in the
; device specific datasheet. In most applications, the tolerence of the
; reference generator is more than adequate to detect Low Battery.
;
; MSP430F20x1
; -----------------
; /|\ | XIN|-
; | | |
; ---|RST XOUT|-
; | |
; +-----|P1.1 P1.0|-->LED
; | | |
; ===.1uf| |
; | | |
; +-----|VSS
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
bis.b #001h,&P1DIR ; P1.0 output
mov.b #P2CA4,&CACTL2 ; P1.1 = CA1
;
Mainloop call #Batt_Check ;
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
Batt_Check
;-------------------------------------------------------------------------------
mov.b #CAREF0+CAON,&CACTL1 ; 0.25*Vcc on P2.3, Comp. on
Wait clr.w R15 ; Delay to R15
L1 dec.w R15 ;
jnz L1 ; Delay over?
mov.b #CARSEL+CAREF1+CAREF0+CAON,&CACTL1 ; 0.55V on -, Comp. on
bit.b #CAOUT,&CACTL2 ;
clr.b &CACTL1 ; Disable Comp_A, save power
jnc Batt_Low ;
xor.b #001h,&P1OUT ; P1.0 toggle
ret ;
Batt_Low bis.b #001h,&P1OUT ; P1.0 set
ret
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_01.asm
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A1, AVcc Ref, Set P1.0 if A1 > 0.5*AVcc
;
; Description: A single sample is made on A1 with reference to AVcc.
; Software sets ADC10SC to start sample and conversion - ADC10SC
; automatically cleared at EOC. ADC10 internal oscillator times sample (16x)
; and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10
; conversion complete, ADC10_ISR will force exit from any LPMx in Mainloop on
; reti. If A1 > 0.5*AVcc, P1.0 set, else reset.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|--> LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #ADC10SHT_2+ADC10ON+ADC10IE,&ADC10CTL0 ; 16x, enable int.
mov.w #INCH_1, &ADC10CTL1
bis.b #02h,&ADC10AE0 ; P1.1 ADC10 option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling/conversion
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #01h,&P1OUT ; P1.0 = 0
cmp.w #01FFh,&ADC10MEM ; ADC10MEM = A1 > 0.5AVcc?
jlo Mainloop ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_02.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A1, 1.5V Ref, Set P1.0 if A1 > 0.2V
;
; Description: A single sample is made on A1 with reference to internal
; 1.5V Vref. Software sets ADC10SC to start sample and conversion - ADC10SC
; automatically cleared at EOC. ADC10 internal oscillator times sample (16x)
; and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10
; conversion complete, ADC10_ISR will force exit from any LPMx in Mainloop on
; reti. If A1 > 0.2V, P1.0 set, else reset.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|--> LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #SREF_1+ADC10SHT_2+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint
bis.b #02h,&ADC10AE0 ; P1.1 ADC10 option select
mov.w #INCH_1, &ADC10CTL1 ; A1 input
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling/conversion
bis.w #CPUOFF+GIE,SR ; LPM0, ADC12 ISR will force exit
bic.b #01h,&P1OUT ; P1.0 = 0
cmp.w #088h,&ADC10MEM ; ADC10MEM = A1 > 0.2V?
jlo Mainloop ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0, interrupts enabled
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #LPM0,0(SP) ; Exit LPM0, interrupts enabled
reti ;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_03.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A10 Temp, Set P1.0 if Temp ++ ~2C
;
; Description: Set ADC10 and the integrated temperature sensor to detect
; temperature gradients. The temperature sensor output voltage is sampled
; ~ every 120ms and compared with the defined delta values using an ISR.
; (ADC10OSC/4)/64 determines sample time which needs to be greater than
; 30us for temperature sensor.
; ADC10 is operated in repeat-single channel mode with the sample and
; convert trigger sourced from Timer_A CCR1. The ADC10IFG at the end
; of each converstion will trigger an ISR.
; ACLK = n/a, MCLK = SMCLK = default DCO ~1.2MHz, ADC10CLK = ADC10OSC
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A10 (Temp) P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;-------------------------------------------------------------------------------
ADCDeltaOn .equ 3 ; ~ 2 Deg C delta for LED on
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
mov.w #ADC10DIV_3+INCH_10+SHS_1+CONSEQ_2,&ADC10CTL1
mov.w #SREF_1+ADC10SHT_3+REF2_5V+ADC10IE+REFON+ADC10ON,&ADC10CTL0
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
bis.w #ENC,&ADC10CTL0
mov.w #OUTMOD_4,&TACCTL1 ; Toggle on EQU1 (TAR = 0)
mov.w #TASSEL_2+MC_2,&TACTL ; SMCLK, cont-mode
ADC_Wait bit.w #ADC10IFG,&ADC10CTL0 ; First conversion?
jnc ADC_Wait
mov.w &ADC10MEM,R4 ; Read out 1st ADC value
add.w #ADCDeltaOn,R4 ;
clr.b &P1OUT ; Clear P1
bis.b #01h,&P1DIR ; P1.0 as output
;
Mainloop bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
nop ; Required only for debugger
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
cmp.w R4,&ADC10MEM ; ADC10MEM = A10 > R4
jlo ADC_ISR_1 ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
reti ;
ADC_ISR_1 bic.b #01h,&P1OUT ; P1.0 = 0
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_04.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A1, Signed, Set P1.0 if A1 > 0.5*AVcc
;
; Description: A single sample is made on A1 with SIGNED reference to AVcc.
; Software sets ADC10SC to start sample and conversion - ADC10SC
; automatically cleared at EOC. ADC10 internal oscillator times sample (16x)
; and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10
; conversion complete, ADC10_ISR will force exit from any LPMx in Mainloop on
; reti. If A1 > 0.5*AVcc, P1.0 set, else reset.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|--> LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #ADC10DF+INCH_1,&ADC10CTL1 ; Conversion code singed format
mov.w #ADC10SHT_2+ADC10ON+ADC10IE,&ADC10CTL0 ; 16x, enable int.
bis.b #02h,&ADC10AE0 ; P1.1 ADC10 option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Sampling and conversion start
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #01h,&P1OUT ; P1.0 = 0
tst.w &ADC10MEM ; ADC10MEM = A1 > 0.5AVcc?
jl Mainloop ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_05.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A11, Lo_Batt, Set P1.0 if AVcc < 2.3V
;
; Description: A single sample is made on A11 (AVcc/2) with reference to
; internal 1.5V Vref. Software sets ADC10SC to start sample and conversion
; - ADC10SC automatically cleared at EOC. ADC10 internal oscillator times
; sample (16x) and conversion. ADC10BUSY flag is polled for EOC. If A11
; (AVcc/2) < 0311h (0.65V) indicating AVcc is less 2.3V, P1.0 set indicating
; a lo_Batt condition, else reset.
;
; MSP430F20x2
; --------------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A11 (AVcc/2) P1.0 |--> LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_11,&ADC10CTL1 ; AVcc/2
mov.w #SREF_1+ADC10SHT_2+REFON+ADC10ON,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling/conversion
L1 bit.w #ADC10BUSY,&ADC10CTL1 ; ADC10BUSY?
jnz L1 ;
cmp.w #0311h,&ADC10MEM ; ADC10MEM = A11 (AVcc/2) > 0.65V?
jlo lo_Batt ;
bic.b #01h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
lo_Batt bis.b #01h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_06.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Output Internal Vref on P1.4 & ADCCLK on P1.3
;
; Description: Output ADC10 internal Vref on P1.4, toggling between two
; available options, 2.5V and 1.5V. ADC10OSC also output on P1.3.
;
; MSP430F20x2
; ----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.3/ADC10CLK|--> ADC10OSC ~ 3.5MHz - 6.5MHz
; | P1.4/A4|--> Vref
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #CONSEQ_2,&ADC10CTL1 ; Repeat single channel
mov.w #REFOUT+REFON+MSC+ADC10ON,&ADC10CTL0; ADC10 and VRef
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
bis.b #010h,&ADC10AE0 ; P1.4 = ADC10 option select
bis.b #008h,&P1DIR ; P1.3 = output directon
bis.b #008h,&P1SEL ; P1.3 = ADC10OSC option select
;
Mainloop bic.w #ENC,&ADC10CTL0 ; ADC10 disable
xor.w #REF2_5V,&ADC10CTL0 ; Toggle Vref 1.5/2.5V
bis.w #ENC+ADC10SC,&ADC10CTL0 ; ADC10 enable, start conversion
Delay mov.w #00Fh,R15 ; Long Delay
mov.w #0,R14 ;
Delay_1 dec.w R14 ;
sbc.w R15 ;
jnz Delay_1 ;
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_07.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A1 32x, AVcc, Repeat Single, DCO
;
; Description: Use DTC to sample A1 32 times with reference to AVcc. Software
; writes to ADC10SC to trigger sample burst. In Mainloop MSP430 waits in LPM0
; to save power until ADC10 conversion burst complete, ADC10_ISR(DTC) will
; force exit from any LPMx in Mainloop on reti. ADC10 internal oscillator
; times sample period (16x) and conversion (13x). DTC transfers conversion
; code to RAM 200h - 240h. P1.0 set at start of conversion burst, reset on
; completion.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #CONSEQ_2+INCH_1,&ADC10CTL1 ; Repeat single channel, A1
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0 ;
bis.b #02h,&ADC10AE0 ; P1.1 ADC option select
mov.b #020h,&ADC10DTC1 ; 32 conversions
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 = 1
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Sampling and conversion start
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_08.asm
Executable
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@@ -0,0 +1,122 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A1 32x, 1.5V, Repeat Single, DCO
;
; Description: Use DTC to sample A1 32 times with reference to internal 1.5v.
; Vref Software writes to ADC10SC to trigger sample burst. In Mainloop MSP430
; waits in LPM0 to save power until ADC10 conversion complete, ADC10_ISR(DTC)
; will force exit from any LPMx in Mainloop on reti. ADC10 internal
; oscillator times sample period (16x) and conversion (13x). DTC transfers
; conversion code to RAM 200h - 240h. P1.0 set at start of conversion burst,
; reset on completion.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #CONSEQ_2+INCH_1,&ADC10CTL1 ; Repeat single channel
mov.w #SREF_1+ADC10SHT_2+MSC+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
mov.b #020h,&ADC10DTC1 ; 32 conversions
bis.b #02h,&ADC10AE0 ; P1.1 ADC option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 = 1
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_09.asm
Executable
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@@ -0,0 +1,122 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A10 32x, 1.5V, Repeat Single, DCO
;
; Description: Use DTC to sample A10 32 times with reference to internal 1.5v.
; Vref Software writes to ADC10SC to trigger sample burst. In Mainloop MSP430
; waits in LPM0 to save power until ADC10 conversion complete, ADC10_ISR(DTC)
; will force exit from any LPMx in Mainloop on reti. (ADC10OSC/4)/64
; determines sample time which needs to be greater than 30us for temperature
; sensor. DTC transfers conversion code to RAM 200h - 240h. P1.0 set at start
; of conversion burst, reset oncompletion. Temperature sensor offset and slope
; will vary from device to device per datasheet tolerance.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A10 P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_10+ADC10DIV_3+CONSEQ_2,&ADC10CTL1 ;
mov.w #SREF_1+ADC10SHT_3+MSC+REFON+ADC10ON+ADC10IE,&ADC10CTL0 ;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
mov.b #020h,&ADC10DTC1 ; 32 conversions
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 =1
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_10.asm
Executable
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@@ -0,0 +1,110 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A3-01, AVcc, Single Sequence, DCO
;
; Description: Sample A3/A2/A1 as single sequence with reference to AVcc.
; Software sets ADC10SC to trigger sample sequence. In Mainloop MSP430 waits
; in LPM0 to save power until ADC10 conversion complete, ADC10_ISR(DTC) will
; force exit from any LPMx in Mainloop on reti. ADC10_ISR will force any LPMx
; exit. ADC10 internal oscillator times sample period (16x) and conversion
; (13x). DTC transfers conversion code to RAM 200h - 206h. P1.0 set at start
; of conversion burst, reset on completion.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.3/A3 P1.0|-->LED
; >---|P1.2/A2 |
; >---|P1.1/A1 |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_3+CONSEQ_1,&ADC10CTL1 ; A3/A2/A1, single sequence
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0 ;
bis.b #0Eh,&ADC10AE0 ; P1.1,2,3 ADC10 option selects
mov.b #03h,&ADC10DTC1 ; 3 conversions
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 = 0
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_11.asm
Executable
+121
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@@ -0,0 +1,121 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A1, 1.5V, TA1 Trig, Set P1.0 if > 0.5V
;
; Description: A1 is sampled 16/second (ACLK/2048) with reference to 1.5V.
; Timer_A is run in upmode and TA1 is used to automatically trigger
; ADC10 conversion, TA0 defines the period. Internal oscillator times sample
; (16x) and conversion (13x). Inside ADC10_ISR if A1 > 0.5Vcc, P1.0 is set,
; else reset. Normal mode is LPM3.
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|--> LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #SHS_1+CONSEQ_2+INCH_1,&ADC10CTL1 ; TA1 trigger sample start
mov.w #SREF_1+ADC10SHT_2+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0,enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
bis.w #ENC,&ADC10CTL0 ; ADC10 enable set
bis.b #002h,&ADC10AE0 ; P1.1 ADC10 option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC0 mov.w #2048-1,&TACCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_3,&TACCTL1 ; TACCR1 set/reset
mov.w #2047,&TACCR1 ; TACCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_1+MC_1,&TACTL ; ACLK, up mode
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
bic.b #01h,&P1OUT ; P1.0 = 0
cmp.w #0155h,&ADC10MEM ; ADC10MEM = A1 > 0.5V?
jlo ADC10_Exit ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
ADC10_Exit reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_12.asm
Executable
+130
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@@ -0,0 +1,130 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A7, 1.5V, TA1 Trig, Ultra-Low Pwr
;
; Description: A7 is sampled 1024/second (32xACLK) with reference to 1.5V.
; All activity is interrupt driven with proper usage of MSP430 low-power
; modes, ADC10 and Vref demonstrated. Timer_A with both TA1/TA0 used in
; upmode to drive ADC10 conversion (continuous mode can also be used).
; Inside of TA0_ISR software will enable ADC10 and internal reference and
; allow > 30us delay for Vref to stabilize prior to sample start. Sample
; start is automatically triggered by TA1 every 32 ACLK cycles. ADC10_ISR
; will disable ADC10 and Vref and compare ADC10 conversion code. Internal
; oscillator times sample (16x) and conversion (13x). If A7 > 0.2Vcc,
; P1.0 is set, else reset. Normal Mode is LPM3.
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; +-----(0.9766us)---------\\------------------>+
; TA0_ISR TA1 ADC10_ISR TA0_ISR TA1
; -----+------------+------------+-----------\\------+------------+----->
; Enable ADC Trigger ADC Disable ADC
; and Vref Compare
; +-( >30us--->+
;
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; >---|P1.7/A7 P1.0 |--> LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_7+SHS_1,&ADC10CTL1 ; P1.7, TA1 trigger sample start
bis.b #080h,&ADC10AE0 ; P1.7 ADC10 option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC0 mov.w #CCIE,&TACCTL0 ; Enable interrupt
mov.w #32-1,&TACCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_3,&TACCTL1 ; TACCR1 set/reset
mov.w #2,&TACCR1 ; TACCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_1+MC_1,TACTL ; ACLK, up mode
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
bic.w #ENC,&ADC10CTL0 ; ADC10 disabled
clr.w &ADC10CTL0 ; ADC10, Vref disabled completely
bic.b #01h,&P1OUT ; P1.0 = 0
cmp.w #088h,&ADC10MEM ; ADC10MEM = A7 > 0.2V?
jlo ADC10_Exit ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
ADC10_Exit reti ;
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
mov.w #SREF_1+ADC10SHT_2+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
bis.w #ENC,&ADC10CTL0 ; ADC10 enable set
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_13.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A1 32x, AVcc, TA0 Trig, DCO
;
; Description: A1 is sampled in 32x burst using DTC ever 16/second
; (ACLK/2048) with reference to AVcc. All. Activity is interrupt driven.
; Timer_A in upmode uses TA0 toggle to drive ADC10 conversion. Sample burst
; is automatically triggered by TA0 rising edge every 16 ACLK cycles.
; ADC10_ISR will exit from LPM3 mode and return CPU active. Internal ADC10OSC
; times sample (16x) and conversion (13x). DTC transfers conversion code to
; RAM 200h - 240h. In the Mainloop P1.0 is toggled. Normal Mode is LPM3.
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0 |--> LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_1+SHS_2+CONSEQ_2,&ADC10CTL1 ; TA0 trigger
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0;
mov.b #020h,&ADC10DTC1 ; 32 conversions
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
bis.b #002h,&ADC10AE0 ; P1.1 ADC10 option select
mov.w #1024-1,&TACCR0 ; PWM Period
SetupC0 mov.w #OUTMOD_4,&TACCTL0 ; TACCR0 toggle
SetupTA mov.w #TASSEL_1+MC_1,TACTL ; ACLK, up mode
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.w #ENC,&ADC10CTL0 ; Sampling and conversion ready
bis.w #LPM3+GIE,SR ; LPM3, ADC10_ISR will force exit
xor.b #001h,&P1OUT ; P1.0 = toggle
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM3 on reti
;-------------------------------------------------------------------------------
bic.w #LPM3,0(SP) ; Exit LPM3 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_14.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A1-0 16x, AVcc, Repeat Seq, DCO
;
; Description: Use DTC to sample A1/A0 repeat sequence 16x(32 total samples)
; with reference to AVcc. Software writes to ADC10SC to trigger sample burst.
; In Mainloop MSP430 waits in LPM0 to save power until ADC10 conversion
; complete, ADC10_ISR will force exit from any LPMx in Mainloop on reti.
; ADC10 internal oscillator times sample period (16x) and conversion (13x).
; DTC transfers conversion code to RAM 200h - 240h. ADC10(DTC) interrupt
; will return system active.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 |
; >---|P1.0/A0 |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_1+CONSEQ_3,&ADC10CTL1 ; A1/A0, repeat multi channel
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0 ;
bis.b #03h,&ADC10AE0 ; P1.0,1 ADC option select
mov.b #020h,&ADC10DTC1 ; 32 conversions
;
Mainloop
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; CPU off, Enable interrupts
nop ; space for debugger
nop ; set breakpoint here to read ADC
jmp Mainloop ; Again, set breakpoint here to read ADC
;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
bic.w #ENC,&ADC10CTL0 ; ADC10 disabled
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_16.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A0 -> TA1, AVcc, DCO
;
; Description: Use DTC to sample A0 with reference to AVcc and directly
; transfer code to CCR1. Timer_A has been configured for 10-bit PWM mode.
; CCR1 duty cycle is automatically proportional to ADC10 A0. WDT_ISR used
; as a period wakeup timer approximately 45ms based on default ~1.2MHz
; DCO/SMCLK clock source used in this example for the WDT clock source.
; Timer_A also uses default DCO.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.0/A0 P1.2|--> TACCR1 - 0-1024 PWM
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDT_MDLY_32,&WDTCTL ; WDT ~45ms interval timer
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupADC10 mov.w #ADC10SHT_2+ADC10ON,&ADC10CTL0 ;
bis.b #01h,&ADC10AE0 ; P1.0 ADC option select
mov.b #001h,&ADC10DTC1 ; 1 conversion
SetupP1 bis.b #004h,&P1DIR ; P1.2 = output
bis.b #004h,&P1SEL ; P1.2 = TA1 output
SetupC0 mov.w #1024-1,&TACCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_7,&TACCTL1 ; TACCR1 reset/set
mov.w #512,&TACCR1 ; TACCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_2+MC_1,&TACTL ; SMCLK, upmode
;
Mainloop bis.b #CPUOFF+GIE,SR ; LPM0, WDT_ISR will force exit
mov.w #TACCR1,&ADC10SA ; Data transfer location
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
WDT_ISR; Exit LPM0 mode, reti returns system active
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int10" ; WDT Vector
.short WDT_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x2_adc10_temp.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A10 Temp and Convert to oC and oF
;
; Description: A single sample is made on A10 with reference to internal
; 1.5V Vref. Software sets ADC10SC to start sample and conversion - ADC10SC
; automatically cleared at EOC. ADC10 internal oscillator/4 times sample
; (64x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until
; ADC10 conversion complete, ADC10_ISR will force exit from any LPMx in
; Mainloop on reti. Result is converted to Temperature represented as
; BCD 0000 - 0145 representing oC saved at 0200h and 0000 - 0292 representing
; oF saved at 0202h. Temperature sensor offset and slope will vary from device
; to device per datasheet tolerance.
; Uncalibrated temperature measured from device to devive will vary with
; slope and offset - please see datasheet.
; ACLK = n/a, MCLK = SMCLK = default DCO ~1.2MHz, ADC10CLK = ADC10OSC/4
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A10 |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_10+ADC10DIV_3,&ADC10CTL1 ; Temp Sensor ADC10CLK/4
mov.w #SREF_1+ADC10SHT_3+REFON+ADC10ON+ADC10IE,&ADC10CTL0 ;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ;
;
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling/conversion
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
call #Trans2TempC ; Transform voltage to temperature
call #BIN2BCD4 ; R13 = TempC = 0000 - 0145 BCD
mov.w R13,&0200h ; 0200h = temperature oC
call #Trans2TempF ; Transform voltage to temperature
call #BIN2BCD4 ; R13 = TempF = 0000 - 0292 BCD
mov.w R13,&0202h ; 0202h = temperature oF
jmp Mainloop ; << breakpoint here
;
;-------------------------------------------------------------------------------
Trans2TempC;Subroutine coverts R12 = ADC10MEM/1024*423-278
; oC = ((x/1024)*1500mV)-986mV)*1/3.55mV = x*423/1024 - 278
; Input: ADC10MEM 0000 - 0FFFh, R11, R12, R14, R15 working register
; Output: R12 0000 - 091h
;-------------------------------------------------------------------------------
mov.w &ADC10MEM,R12 ;
mov.w #423,R11 ; C
call #MPYU ;
bic.w #00FFh,R14 ; /1024
add.w R15,R14 ;
swpb R14 ;
rra.w R14 ;
rra.w R14 ;
mov.w R14,R12 ;
sub.w #278,R12 ; C
ret ;
;
;-------------------------------------------------------------------------------
Trans2TempF;Subroutine coverts R12 = ADC10MEM/1024*761-468
; oF = ((x/1024)*1500mV)-923mV)*1/1.97mV = x*761/1024 - 468
; Input: ADC10MEM 0000 - 0FFFh, R11, R12, R14, R15 working register
; Output: R12 0000 - 0124h
;-------------------------------------------------------------------------------
mov.w &ADC10MEM,R12 ;
mov.w #761,R11 ; F
call #MPYU ;
bic.w #00FFh,R14 ; /1024
add.w R15,R14 ;
swpb R14 ;
rra.w R14 ;
rra.w R14 ;
mov.w R14,R12 ;
sub.w #468,R12 ; F
ret ;
;
;-------------------------------------------------------------------------------
BIN2BCD4 ; Subroutine converts binary number R12 -> Packed 4- digit BCD R13
; Input: R12 0000 - 0FFFh, R15 working register
; Output: R13 0000 - 4095
;-------------------------------------------------------------------------------
mov.w #16,R15 ; Loop Counter
clr.w R13 ; 0 -> RESULT LSD
BIN1 rla.w R12 ; Binary MSB to carry
dadd.w R13,R13 ; RESULT x2 LSD
dec.w R15 ; Through?
jnz BIN1 ; Not through
ret ;
;
;-------------------------------------------------------------------------------
MPYU ; Unsigned Multipy R11 x R12 = R15|R14
; Input: R11, R12 -- R10 and R13 are working registers
; Output: R15, R14
;-------------------------------------------------------------------------------
clr.w R14 ; 0 -> LSBs result
clr.w R15 ; 0 -> MSBs result
MACU clr.w R13 ; MSBs multiplier
mov.w #1,R10 ; bit test register
MPY2 bit.w R10,R11 ; test actual bit
jz MPY1 ; IF 0: do nothing
add.w R12,R14 ; IF 1: add multiplier to result
addc.w R13,R15 ;
MPY1 rla.w R12 ; multiplier x 2
rlc.w R13 ;
rla.w R10 ; next bit to test
jnc MPY2 ; if bit in carry: finished
ret ; Return from subroutine
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPMx, interrupts enabled
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_1.asm
Executable
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@@ -0,0 +1,87 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;******************************************************************************
; MSP-FET430F2013 Demo - Software Toggle P1.0
;
; Description: Toggle P1.0 by xor'ing P1.0
; ACLK = n/a, MCLK = SMCLK = default DCO ~800kHz
;
; MSP430x20x3
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop xor.b #001h,&P1OUT ; Toggle P1.0
Wait mov.w #050000,R15 ; Delay to R15
L1 dec.w R15 ; Decrement R15
jnz L1 ; Delay over?
jmp Mainloop ; Again
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_1_vlo.asm
Executable
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@@ -0,0 +1,99 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Software Toggle P1.0, MCLK = VLO/8
;
; Description; Pulse P1.0 with a 1/100 active duty cycle using software.
; Ultra-low frequency ~ 1.5kHz, ultra-low power active mode demonstrated.
; ACLK = VL0, MCLK = VLO/8 ~1.5kHz, SMCLK = n/a
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupBC bis.b #LFXT1S_2,&BCSCTL3 ; LFXT1 = VLO
SetupOsc bic.b #OFIFG,&IFG1 ; Clear OSC fault flag
bis.w #SCG1+SCG0,SR ; Stop DCO
bis.b #SELM_3+DIVM_3,&BCSCTL2 ; MCLK = LFXT1/8
SetupP1 mov.b #0FFh,&P1DIR ; All P1.x outputs
clr.b &P1OUT ; All P1.x reset
SetupP2 mov.b #0FFh,&P2DIR ; All P2.x outputs
clr.b &P2OUT ; All P2.x reset
;
Mainloop bis.b #001h,&P1OUT ; Set P1.0
Delay1 mov.w #020,R15 ; Delay to R15
L1 dec.w R15 ;
jnz L1 ;
bic.b #001h,&P1OUT ; Reset P1.0
Delay2 mov.w #02000,R15 ; Delay to R15
L2 dec.w R15 ;
jnz L2 ;
jmp Mainloop ; Again
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_LFxtal_nmi.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - LFXT1 Oscillator Fault Detection
;
; Description: System runs normally in LPM3 with WDT timer clocked by
; 32kHz ACLK with a 1x4 second interrupt. P1.0 is normally pulsed every
; second inside WDT interrupt. If an LFXT1 oscillator fault occurs,
; NMI is requested forcing exit from LPM3. P1.0 is toggled rapidly by software
; as long as LFXT1 oscillator fault is present. Assumed only LFXT1 as NMI
; source - code does not check for other NMI sources.
; ACLK = LFXT1 = 32768, MCLK = SMCLK = Default DCO
;
; //*External watch crystal on XIN XOUT is required for ACLK*//
;
;
; MSP430F20xx
; ---------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED;
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDT_ADLY_1000,&WDTCTL ; WDT 1s interval timer
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 mov.b #0FFh,&P1DIR ; All P1.x outputs
clr.b &P1OUT ; All P1.x reset
SetupP2 mov.b #0FFh,&P2DIR ; All P2.x outputs
clr.b &P2OUT ; All P2.x reset
; An immedate Osc Fault will occur next
bis.b #OFIE,&IE1 ; Enable osc fault interrupt
;
Mainloop xor.b #001h,&P1OUT ; Toggle P1.0
bis.w #LPM3+GIE,SR ; Enter LPM3, enable interrupts
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
NMI_ISR; Only osc fault enabled, R15 used temporarily and not saved
; Assumed LFXT1 is only source for NMI interrupt
;-------------------------------------------------------------------------------
CheckOsc bic.b #OFIFG,&IFG1 ; Clear OSC fault flag
xor.b #001h,&P1OUT ; Toggle P1.0
mov.w #03FFFh,R15 ; R15 = Delay
CheckOsc1 dec.w R15 ; Time for flag to set
jnz CheckOsc1 ;
bit.b #OFIFG,&IFG1 ; OSC fault flag set?
jnz CheckOsc ; OSC Fault, clear flag again
bis.b #OFIE,&IE1 ; re-enable osc fault interrupt
reti ; return from interrupt
;
;-------------------------------------------------------------------------------
WDT_ISR; Exit LPM3 on reti
;-------------------------------------------------------------------------------
bic.w #LPM3,0(SP) ;
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int10" ; WDT Vector
.short WDT_ISR ;
.sect ".int14" ; NMI Vector
.short NMI_ISR
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_P1_01.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Software Poll P1.4, Set P1.0 if P1.4 = 1
;
; Description: Poll P1.4 in a loop, if hi P1.0 is set, if low, P1.0 reset.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | |
; --o--|P1.4 P1.0|-->LED
; \|/
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bit.b #010h,&P1IN ; P1.4 hi/low?
jc ON ; jmp--> P1.4 is set
;
OFF bic.b #001h,&P1OUT ; P1.0 = 0 / LED OFF
jmp Mainloop ;
ON bis.b #001h,&P1OUT ; P1.0 = 1 / LED ON
jmp Mainloop ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_P1_02.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Software Port Interrupt on P1.4 from LPM4
;
; Description: A hi/low transition on P1.4 will trigger P1_ISR which,
; toggles P1.0. Normal mode is LPM4 ~ 0.1uA. LPM4 current can be measured
; with the LED removed, all unused P1.x/P2.x configured as output or inputs
; pulled high or low, and ensure the P2.0 interrupt input does not float.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | |
; --o--|P1.4 P1.0|-->LED
; \|/
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupPx bis.b #001h,&P1DIR ; P1.0 output
bis.b #010h,&P1IE ; P1.4 Interrupt enabled
bis.b #010h,&P1IES ; P1.4 hi/low edge
bic.b #010h,&P1IFG ; P1.4 IFG Cleared
;
Mainloop bis.w #LPM4+GIE,SR ; LPM4, enable interrupts
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
P1_ISR; Toggle P1.0 Output
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; P1.0 = toggle
bic.b #010h,&P1IFG ; P1.4 IFG Cleared
reti ; Return from ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int02" ; P1.x Vector
.short P1_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_P1_03.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Poll P1 With Software with Internal Pull-up
;
; Description: Poll P1.4 in a loop, if hi P1.0 is set, if low, P1.0 reset.
; Internal pullup enabled on P1.4.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | R |
; --o--| P1.4-o P1.0|-->LED
; \|/
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 mov.b #001h,&P1DIR ; P1.0 output, else input
mov.b #010h,&P1OUT ; P1.4 set, else reset
bis.b #010h,&P1REN ; P1.4 pullup
Mainloop bit.b #010h,&P1IN ; P1.4 hi/low?
jc ON ; jmp--> P1.4 is set
;
OFF bic.b #001h,&P1OUT ; P1.0 = 0 / LED OFF
jmp Mainloop ;
ON bis.b #001h,&P1OUT ; P1.0 = 1 / LED ON
jmp Mainloop ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_P1_04.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - P1 Interrupt from LPM4 with Internal Pull-up
;
; Description: A hi/low transition on P1.4 will trigger P1_ISR which,
; toggles P1.0. Normal mode is LPM4 ~ 0.1uA.
; Internal pullup enabled on P1.4.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | R |
; --o--| P1.4-o P1.0|-->LED
; \|/
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 mov.b #001h,&P1DIR ; P1.0 output, else input
mov.b #010h,&P1OUT ; P1.4 set, else reset
bis.b #010h,&P1REN ; P1.4 pullup
bis.b #010h,&P1IE ; P1.4 Interrupt enabled
bis.b #010h,&P1IES ; P1.4 hi/low edge
bic.b #010h,&P1IFG ; P1.4 IFG Cleared
;
Mainloop bis.w #LPM4+GIE,SR ; LPM4, enable interrupts
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
P1_ISR; Toggle P1.0 Output
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; P1.0 = toggle
bic.b #010h,&P1IFG ; P1.4 IFG Cleared
reti ; Return from ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int02" ; P1.x Vector
.short P1_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_clks.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Basic Clock, Output Buffered SMCLK, ACLK and MCLK/10
;
; Description: Buffer ACLK on P1.0, default SMCLK(DCO) on P1.4 and MCLK/10 on
; P1.1.
; ACLK = LFXT1 = 32768, MCLK = SMCLK = default DCO
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.4/SMCLK|-->SMCLK = Default DCO
; | P1.1|-->MCLK/10 = DCO/10
; | P1.0/ACLK|-->ACLK = 32kHz
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupPx bis.b #013h,&P1DIR ; P1.0,1,4 output direction
bis.b #011h,&P1SEL ; P1.0,4 = ACLK,SMCLK
;
Mainloop bis.b #002h,&P1OUT ; P1.1 = 1
bic.b #002h,&P1OUT ; P1.1 = 0
jmp Mainloop ; Repeat
;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_flashwrite_01.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Flash In-System Programming, Copy SegC to SegD
;
; Description: This program first erases flash seg C, then it increments all
; values in seg C, then it erases seg C, then copies seg C to seg D.
; Assumed MCLK 771kHz - 1428kHz.
; //* Set Breakpoint in the Mainloop to avoid Stressing Flash *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
;
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
value .equ R4
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
CheckCal cmp.b #0xFF,&CALBC1_1MHZ ; Check calibration constants
jne Load ; if not erased, load.
Trap jmp Trap ; if erased do not load, trap CPU!
Load clr.b &DCOCTL ; Select lowest DCOx and MODx settings
mov.b &CALBC1_1MHZ,&BCSCTL1 ; Set DCO to 1MHz
mov.b &CALDCO_1MHZ,&DCOCTL
clr.b value ; value = value to write to flash
;
Mainloop call #Write_SegC ; Copy value to segment C
inc.b value ;
call #CopyC2D ;
jmp Mainloop ; Repeat,SET BREAKPOINT HERE
;
;-------------------------------------------------------------------------------
Write_SegC ;Input = value, holds value to write to Seg C, R5 used as working reg.
;-------------------------------------------------------------------------------
mov.w #01040h,R5 ;
Timing mov.w #FWKEY+FSSEL0+FN1,&FCTL2 ; *Timing generator = MCLK/3
Erase_SegC mov.w #FWKEY,&FCTL3 ; Lock = 0
mov.w #FWKEY+ERASE,&FCTL1 ; Erase bit = 1, allow interrupts
mov.w #0,&01040h ; Dummy write to SegC to erase
Prog_SegC mov.w #FWKEY+WRT,&FCTL1 ; Write bit = 1, block interrupts
mov.w #FWKEY,&FCTL3 ; Lock = 0
Prog_L1 mov.b value,0(R5) ;
inc.w R5 ;
cmp.w #01080h,R5 ;
jne Prog_L1 ;
mov.w #FWKEY+LOCK,&FCTL3 ; Lock = 1;
ret ;
;
;-------------------------------------------------------------------------------
CopyC2D ;Copy Seg C to Seg D, R5 used as working reg.
;-------------------------------------------------------------------------------
mov.w #FWKEY+FSSEL0+FN1,&FCTL2 ; *Timing generator = MCLK/3
Erase_SegD mov.w #FWKEY,&FCTL3 ; Lock = 0
mov.w #FWKEY+ERASE,&FCTL1 ; Erase bit = 1
mov.w #0,&01000h ; Dummy write to SegD to erase
mov.w #01040h,R5 ; R5 = First byte in Seg C
Prog_SegD mov.w #FWKEY+WRT,&FCTL1 ; Write bit = 1, block interrupts
mov.w #FWKEY,&FCTL3 ; Lock = 0
Prog_L2 mov.b @R5+,-65(R5) ; Copy Seg C to Seg D
cmp.w #01080h,R5 ;
jne Prog_L2 ;
mov.w #FWKEY+LOCK,&FCTL3 ; Lock = 1
ret
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_lpm3.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Basic Clock, LPM3 Using WDT ISR, 32kHz ACLK
;
; Description: This program operates MSP430 normally in LPM3, pulsing P1.0
; at 4 second intervals. WDT ISR used to wake-up system. All I/O configured
; as low outputs to eliminate floating inputs. Current consumption does
; increase when LED is powered on P1.0. Demo for measuring LPM3 current.
; ACLK = LFXT1/4 = 32768/4, MCLK = SMCLK = default DCO
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDT_ADLY_1000,&WDTCTL ; WDT 1s*4 interval timer
SetupBC bis.b #DIVA_2,&BCSCTL1 ; ACLK/4
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 mov.b #0FFh,&P1DIR ; All P1.x outputs
clr.b &P1OUT ; All P1.x reset
SetupP2 mov.b #0FFh,&P2DIR ; All P2.x outputs
clr.b &P2OUT ; All P2.x reset
;
Mainloop bis.b #001h,&P1OUT ; Set P1.0
push.w #5000 ; Delay to TOS
Delay dec.w 0(SP) ; Decrement TOS
jnz Delay ; Delay over?
incd.w SP ; Clean stack
bic.b #001h,&P1OUT ; Reset P1.0
bis.w #LPM3+GIE,SR ; Enter LPM3, enable interrupts
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
WDT_ISR ; Exit LPM3 on reti
;-------------------------------------------------------------------------------
bic.w #LPM3,0(SP) ; Clear LPM3 from TOS
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_lpm3_vlo.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Basic Clock, LPM3 Using WDT ISR, VLO ACLK
;
; Description: This program operates MSP430 normally in LPM3, pulsing P1.0
; ~ 6 second intervals. WDT ISR used to wake-up system. All I/O configured
; as low outputs to eliminate floating inputs. Current consumption does
; increase when LED is powered on P1.0. Demo for measuring LPM3 current.
; ACLK = VLO/2, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDT_ADLY_1000,&WDTCTL ; WDT 1s*4 interval timer
bis.b #DIVA_1,&BCSCTL1 ; ACLK/2
bis.b #LFXT1S_2,&BCSCTL3 ; ACLK = VLO
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 mov.b #0FFh,&P1DIR ; All P1.x outputs
clr.b &P1OUT ; All P1.x reset
SetupP2 mov.b #0FFh,&P2DIR ; All P2.x outputs
clr.b &P2OUT ; All P2.x reset
;
Mainloop bis.b #001h,&P1OUT ; Set P1.0
push.w #5000 ; Delay to TOS
Delay dec.w 0(SP) ; Decrement TOS
jnz Delay ; Delay over?
incd.w SP ; Clean stack
bic.b #001h,&P1OUT ; Reset P1.0
bis.w #LPM3+GIE,SR ; Enter LPM3, enable interrupts
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
WDT_ISR ; Exit LPM3 on reti
;-------------------------------------------------------------------------------
bic.w #LPM3,0(SP) ; Clear LPM3 from TOS
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_nmi.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Basic Clock, Configure RST/NMI as NMI
;
; Description: Configure RST/NMI as NMI, hi/lo edge. Flash P1.0 inside of
; NMI_ISR if NMI occurs. General enable interrupt in status register does
; not need to be set for NMI. NMIIE does need to be reset, as NMI_ISR
; automatically clears NMI enable to prevent unintentional stack overflow
; that could result from, bounce or uncontrolled NMI's.
; ACLK = n/a, MCLK = SMCLK = Default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDTPW+WDTHOLD+WDTNMI+WDTNMIES,&WDTCTL ; WDT off NMI hi/lo
bis.b #01h,&P1DIR ; P1.0 = output
bic.b #01h,&P1OUT ; P1.0 = reset
bis.b #NMIIE,&IE1 ; Enable NMI
;
Mainloop jmp Mainloop ; Endless Loop
;
;-------------------------------------------------------------------------------
NMI_ISR ; Flash P1.0
;-------------------------------------------------------------------------------
bis.b #01h,&P1OUT ; P1.0 = set
Wait push.w #020000 ; Delay value --> TOS
Wait1 dec.w 0(SP) ; Decrement TOS
jnz Wait1 ; Delay over?
incd.w SP ; Clean up stack
bic.b #01h,&P1OUT ; P1.0 = reset
bic.b #NMIIFG,&IFG1 ; reclear NMI flag in case bounce
bis.b #NMIIE,&IE1 ; Re-enable NMI interrupt
reti ; Done
;
;-----------------------------------------------------------------------------
; Interrupt Vectors
;-----------------------------------------------------------------------------
.sect ".int14" ; NMI vector
.short NMI_ISR ;
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_sd16A_01.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x3 Demo - SD16A, Sample A1+ Continuously, Set P1.0 if > 0.3V
;
; Description: A continuous single-ended sample is made on A1+ using internal
; VREf. Unipolar output format used.
; Inside of SD16 ISR, if A1 > 1/2VRef (0.3V), P1.0 set, else reset.
; ACLK = n/a, MCLK = SMCLK = SD16CLK = default DCO
;
; MSP430F20x3
; ------------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; Vin+ -->|A1+ P1.2 |
; |A1- = VSS P1.0|-->LED
; | |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupSD16 mov.w #SD16REFON+SD16SSEL_1,&SD16CTL ; 1.2V ref, SMCLK
mov.b #SD16INCH_1,&SD16INCTL0 ; A1+/-
mov.w #SD16UNI+SD16IE,&SD16CCTL0 ; 256OSR, unipolar, inter
mov.b #SD16AE2,&SD16AE ; P1.1 A1+, A1- = VSS
bis.w #SD16SC,&SD16CCTL0 ; Start conversion
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, enable interrupts
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
SD16_ISR;
;-------------------------------------------------------------------------------
bic.b #01h,&P1OUT ;
cmp.w #07FFFh,&SD16MEM0 ; SD16MEM0 > 0.3V?, clears IFG
jlo Done ;
bis.b #01h,&P1OUT ;
Done reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; SD16 Vector
.short SD16_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_sd16A_02.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20F3 Demo - SD16, Using the Integrated Temperature Sensor
;
; Description: Use SD16 and it's integrated temperature sensor to detect
; temperature delta. The temperature sensor output voltage is sampled
; ~ every 240ms and compared with the last value and if more than ~0.5C
; delta, P1.0 is set, else reset.
; SD16 Internal VRef, Bipolar offset binary output format used.
; Watchdog used as interval time and ISR used to start next SD16 conversion.
; ACLK = n/a, MCLK = default DCO, SMCLK = SD16CLK = default DCO/8
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A6+ |
; |A6- P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
ADCDeltaOn .equ 31 ; ~ 0.5 Deg C delta for LED on
; CPU Registers Used
LastADCVal .equ R4
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
bis.b #DIVS_3,&BCSCTL2 ; SMCLK/8
SetupWDT mov.w #WDT_MDLY_32,&WDTCTL ; WDT Timer interval
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupSD16 mov.w #SD16REFON+SD16SSEL_1,&SD16CTL ; 1.2V ref, SMCLK
mov.b #SD16INCH_6,&SD16INCTL0 ; A6+/-
mov.w #SD16SNGL+SD16IE,&SD16CCTL0 ; Single conv, interrupt
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, enable interrupts
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
SD16_ISR;
;-------------------------------------------------------------------------------
add.w #ADCDeltaOn,LastADCVal ;
bic.b #01h,&P1OUT ; LED off
cmp.w LastADCVal,&SD16MEM0 ; Clears IFG
jlo SD16_ISR_1 ;
bis.b #01h,&P1OUT ; LED on
SD16_ISR_1 mov.w &SD16MEM0,LastADCVal ; Store value
reti ;
;
;-------------------------------------------------------------------------------
WDT_ISR;
;-------------------------------------------------------------------------------
bis.w #SD16SC,&SD16CCTL0 ; Start conversion
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int10" ; Watchdog Vector
.short WDT_ISR ;
.sect ".int05" ; SD16 Vector
.short SD16_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_sd16A_03.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;******************************************************************************
; MSP430F20x3 Demo - SD16A Sequence of conversions
; The SD16A takes a sample of a single sequence of channels: A0, A1, then A2.
; Sampling begins with ch A0. The 4th conversion result of each channel is
; stored in memory.
;
;
; MSP430F20x3
; ------------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; Vin+ -->|A0+ P1.0 |
; |A01- = VSS |
; | |
; Vin+ -->|A1+ P1.2 |
; |A1- = VSS |
; | |
; Vin+ -->|A2+ P1.4 |
; |A2- = VSS |
; | |
; | VREF |---+
; | | |
; | | -+- 100nF
; | | -+-
; | | |
; | AVss |---+
; | |
;
;
; R. B. Elliott / H. Grewal
; Texas Instruments
; April 2007
; Built with Code Composer Essentials V2.0
;******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;-------------------------------------------------------------------------------
.text 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
mov.b #DIVS_3, &BCSCTL2 ; SMCLK/8
SetupSD16 mov.w #SD16REFON+SD16SSEL_1,&SD16CTL ; 1.2V ref, SMCLK
mov.b #SD16INCH_0+SD16INTDLY_0,&SD16INCTL0 ; Set channel A0+/-
mov.w #SD16UNI+SD16IE+SD16SNGL,&SD16CCTL0 ; 256OSR, unipolar,
; enable interrupt,
; single conversion
mov.b #SD16AE0,&SD16AE ; P1.0 A0+, A0- = VSS
mov.w #03600h, R4 ; Delay for 1.2V ref startup
Delay dec.w R4;
jne Delay;
mov.w #0h, R5 ; R5 = ch_count
;
Mainloop bis.w #SD16SC,&SD16CCTL0 ; Start conversion
bis.w #CPUOFF+GIE,SR ; CPU off, enable interrupts
nop ; Required only for debugger
jmp Mainloop ; jump back to mainloop
;-------------------------------------------------------------------------------
SD16_ISR;
;-------------------------------------------------------------------------------
cmp.w #01h, R5;
jlo Case0 ; current channel is A0
jeq Case1 ; current channel is A1
jmp Case2 ; current channel is A2
Case0 mov.w &SD16MEM0, R7 ; R7 = A0 conversion results
inc.w R5 ; ch_counter++
mov.b #SD16INCH_1,&SD16INCTL0 ; Enable channel A1+/-
mov.b #SD16AE2, &SD16AE ; Enable external input on A1+
jmp Done ; break
Case1 mov.w &SD16MEM0, R8 ; R8 = A1 conversion results
inc.w R5 ; ch_counter++
mov.b #SD16INCH_2,&SD16INCTL0 ; Enable channel A2+/-
mov.b #SD16AE4, &SD16AE ; Enable external input on A2+
jmp Done ; break
Case2 mov.w &SD16MEM0, R9 ; R9 = A2 conversion results
mov.w #0h, R5 ; Reset channel count (end of seq)
mov.b #SD16AE0, &SD16AE ; Reset external input to A0+/-
mov.b #SD16INCH_0,&SD16INCTL0 ; Reset channel observed
Done bic.w #LPM0,0(SP) ; Exit LPM0
reti ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int07" ; SD16 Vector
.short SD16_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_01.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK
;
; Description: Toggle P1.0 using software and TA_0 ISR. Toggles every
; 50000 SMCLK cycles. SMCLK provides clock source for TACLK.
; During the TA_0 ISR, P1.0 is toggled and 50000 clock cycles are added to
; CCR0. TA_0 ISR is triggered every 50000 cycles. CPU is normally off and
; used only during TA_ISR.
; ACLK = n/a, MCLK = SMCLK = TACLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC0 mov.w #CCIE,&CCTL0 ; CCR0 interrupt enabled
mov.w #50000,&CCR0 ;
SetupTA mov.w #TASSEL_2+MC_2,&TACTL ; SMCLK, contmode
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, interrupts enabled
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
TA0_ISR; Toggle P1.0
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; Toggle P1.0
add.w #50000,&CCR0 ; Add Offset to CCR0
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_02.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK
;
; Description: Toggle P1.0 using software and TA_0 ISR. Timer_A is
; configured for up mode, thus the timer overflows when TAR counts to CCR0.
; In this example CCR0 is loaded with 50000.
; ACLK = n/a, MCLK = SMCLK = TACLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC0 mov.w #CCIE,&CCTL0 ; CCR0 interrupt enabled
mov.w #50000,&CCR0 ;
SetupTA mov.w #TASSEL_2+MC_1,&TACTL ; SMCLK, upmode
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, interrupts enabled
nop ; Required for debugger
;
;-------------------------------------------------------------------------------
TA0_ISR; Toggle P1.0
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; Toggle P1.0
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_03.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.0, Overflow ISR, DCO SMCLK
;
; Description: Toggle P1.0 using software and Timer_A overflow ISR.
; In this example an ISR triggers when TA overflows. Inside the TA
; overflow ISR P1.0 is toggled.
; Proper use of TAIV interrupt vector generator is demonstrated.
; ACLK = n/a, MCLK = SMCLK = TACLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupTA mov.w #TASSEL_2+MC_2+TAIE,&TACTL ; SMCLK, contmode interrupt
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, interrupts enabled
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
TAX_ISR; Common ISR for CCR1-4 and overflow
;-------------------------------------------------------------------------------
add.w &TAIV,PC ; Add Timer_A offset vector
reti ; CCR0 - no source
reti ; CCR1
reti ; CCR2
reti ; CCR3
reti ; CCR4
TA_over xor.b #001h,&P1OUT ; Toggle P1.0
reti ; Return from overflow ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int08" ; Timer_AX Vector
.short TAX_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_04.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.0, Overflow ISR, 32kHz ACLK
;
; Description: Toggle P1.0 using software and the Timer_A overflow ISR.
; In this example an ISR triggers when TA overflows. Inside the ISR P1.0
; is toggled. Toggle rate is exactly 0.5Hz.
; ACLK = TACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupTA mov.w #TASSEL_1+MC_2+TAIE,&TACTL ; ACLK, contmode interrupt
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3, interrupts enabled
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
TAX_ISR; Common ISR for CCR1-4 and overflow
;-------------------------------------------------------------------------------
add.w &TAIV,PC ; Add Timer_A offset vector
reti ; CCR0 - no source
reti ; CCR1
reti ; CCR2
reti ; CCR3
reti ; CCR4
TA_over xor.b #001h,&P1OUT ; Toggle P1.0
reti ; Return from overflow ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int08" ; Timer_AX Vector
.short TAX_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_05.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.0, CCR0 Up Mode ISR, 32kHz ACLK
;
; Description: Toggle P1.0 using software and the TA_0 ISR. Timer_A is
; configured for up mode, thus the timer overflows when TAR counts
; to CCR0. In this example CCR0 is loaded with 1000-1.
; ACLK = TACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC0 mov.w #CCIE,&CCTL0 ; CCR0 interrupt enabled
mov.w #1000-1,&CCR0 ; CCR0 counts to 1000
SetupTA mov.w #TASSEL_1+MC_1,&TACTL ; ACLK, upmode
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3, interrupts enabled
nop ; Required for debugger
;
;-------------------------------------------------------------------------------
TA0_ISR; Toggle P1.0
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; Toggle P1.0
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_06.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.0, CCR1 Cont. Mode ISR, DCO SMCLK
;
; Description: Toggle P1.0 using software and TA_1 ISR. Toggles every
; 50000 SMCLK cycles. SMCLK provides clock source for TACLK.
; During the TA_1 ISR, P1.0 is toggled and 50000 clock cycles are added to
; CCR0. TA_1 ISR is triggered every 50000 cycles. CPU is normally off and
; used only during TA_ISR. Proper use of the TAIV interrupt vector
; generator is demonstrated.
; ACLK = n/a, MCLK = SMCLK = TACLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC1 mov.w #CCIE,&CCTL1 ; CCR1 interrupt enabled
mov.w #50000,&CCR1 ;
SetupTA mov.w #TASSEL_2+MC_2,&TACTL ; SMCLK, contmode
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, interrupts enabled
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
TAX_ISR; Common ISR for CCR1-4 and overflow
;-------------------------------------------------------------------------------
add.w &TAIV,PC ; Add Timer_A offset vector
reti ; CCR0 - no source
jmp CCR1_ISR ; CCR1
reti ; CCR2
reti ; CCR3
reti ; CCR4
TA_over reti ; Return from overflow ISR
;
CCR1_ISR add.w #50000,&CCR1 ; Offset until next interrupt
xor.b #001h,&P1OUT ; Toggle P1.0
reti ; Return from overflow ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int08" ; Timer_AX Vector
.short TAX_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_07.asm
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.0-3, Cont. Mode ISR, DCO SMCLK
;
; Description: Use Timer_A CCRx units and overflow to generate four
; independent timing intervals. For demonstration, CCR0 and CCR1
; output units are optionally selected with port pins P1.1 and P1.2
; in toggle mode. As such, these pins will toggle when respective CCRx
; registers match the TAR counter. Interrupts are also enabled with all
; CCRx units, software loads offset to next interval only - as long as the
; interval offset is added to CCRx, toggle rate is generated in hardware.
; Timer_A overflow ISR is used to toggle P1.0 with software. Proper use
; of the TAIV interrupt vector generator is demonstrated.
; ACLK = n/a, MCLK = SMCLK = TACLK = default DCO ~1MHz
;
; As coded with TACLK ~800kHz DCO, toggle rates:
; P1.1 = CCR0 ~ 1MHz/(2*200) ~2500Hz
; P1.2 = CCR1 ~ 1MHz/(2*1000) ~500Hz
; P1.0 = overflow = 1MHz/(2*65536) ~8Hz
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.1/TA0|--> CCR0
; | P1.2/TA1|--> CCR1
; | P1.0|--> Overflow/software
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #00Eh,&P1SEL ; P1.1 - P1.3 option select
bis.b #00Fh,&P1DIR ; P1.0-3 outputs
SetupC0 mov.w #OUTMOD_4+CCIE,&CCTL0 ; CCR0 toggle, interrupt enabled
SetupC1 mov.w #OUTMOD_4+CCIE,&CCTL1 ; CCR1 toggle, interrupt enabled
SetupTA mov.w #TASSEL_2+MC_2+TAIE,&TACTL ; SMCLK, contmode, interrupt
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, interrupts enabled
nop ; Required for debugger
;
;-------------------------------------------------------------------------------
TA0_ISR;
;-------------------------------------------------------------------------------
add.w #200,&CCR0 ; Offset until next interrupt
reti ;
;
;-------------------------------------------------------------------------------
TAX_ISR; Common ISR for CCR1-4 and overflow
;-------------------------------------------------------------------------------
add.w &TAIV,PC ; Add Timer_A offset vector
reti ; CCR0 - no source
jmp CCR1_ISR ; CCR1
reti ; CCR2
reti ; CCR3
reti ; CCR4
TA_over xor.b #001h,&P1OUT ; Toggle P1.0
reti ; Return from overflow ISR
;
CCR1_ISR add.w #1000,&CCR1 ; Offset until next interrupt
reti ; Return ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.sect ".int08" ; Timer_AX Vector
.short TAX_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_08.asm
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.0-2, Cont. Mode ISR, 32kHz ACLK
;
; Description: Use Timer_A CCRx units and overflow to generate four
; independent timing intervals. For demonstration, CCR0 and CCR2
; output units are optionally selected with port pins P1.1 and P1.2
; in toggle mode. As such, these pins will toggle when respective CCRx
; registers match the TAR counter. Interrupts are also enabled with all
; CCRx units, software loads offset to next interval only - as long as the
; interval offset is added to CCRx, toggle rate is generated in hardware.
; Timer_A overflow ISR is used to toggle P1.0 with software. Proper use
; of the TAIV interrupt vector generator is demonstrated.
; ACLK = TACLK = 32kHz, MCLK = SMCLK = default DCO
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; As coded and with TACLK = 32768Hz, toggle rates are:
; P1.1= CCR0 = 32768/(2*4) = 4096Hz
; P1.2= CCR1 = 32768/(2*16) = 1024Hz
; P1.0= overflow = 32768/(2*65536) = 0.25Hz
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.1/TA0|--> CCR0
; | P1.2/TA1|--> CCR1
; | P1.0|--> Overflow/software
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #006h,&P1SEL ; P1.1 - P1.2 option select
bis.b #007h,&P1DIR ; P1.0-2 outputs
SetupC0 mov.w #OUTMOD_4 +CCIE,&CCTL0 ; CCR0 toggle, interrupt enabled
SetupC1 mov.w #OUTMOD_4 +CCIE,&CCTL1 ; CCR1 toggle, interrupt enabled
SetupTA mov.w #TASSEL_1+MC_2+TAIE,&TACTL ; ACLK, contmode, interrupt
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3, interrupts enabled
nop ; Required for debug
;
;-------------------------------------------------------------------------------
TA0_ISR;
;-------------------------------------------------------------------------------
add.w #4,&CCR0 ; Offset until next interrupt
reti ;
;
;-------------------------------------------------------------------------------
TAX_ISR; Common ISR for CCR1-4 and overflow
;-------------------------------------------------------------------------------
add.w &TAIV,PC ; Add Timer_A offset vector
reti ; CCR0 - no source
jmp CCR1_ISR ; CCR1
reti ; CCR2
reti ; CCR3
reti ; CCR4
TA_over xor.b #001h,&P1OUT ; Toggle P1.0
reti ; Return from overflow ISR
;
CCR1_ISR add.w #16,&CCR1 ; Offset until next interrupt
reti ; Return ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.sect ".int08" ; Timer_AX Vector
.short TAX_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_10.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.1/TA0, Up Mode, DCO SMCLK
;
; Description: Toggle P1.1 using hardware TA0 output. Timer_A is configured
; for up mode with CCR0 defining period, TA0 also output on P1.1. In this
; example, CCR0 is loaded with 500 and TA0 will toggle P1.1 at TACLK/500.
; Thus the output frequency on P1.1 will be the TACLK/1000. No CPU or
; software resources required.
; As coded with TACLK = SMCLK, P1.1 output frequency is ~1000000/1000.
; SMCLK = MCLK = TACLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.1/TA0|--> SMCLK/1000
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #002h,&P1DIR ; P1.1 output
bis.b #002h,&P1SEL ; P1.1 option slect
SetupC0 mov.w #OUTMOD_4,&CCTL0 ; CCR0 toggle, upmode
mov.w #500-1,&CCR0 ;
SetupTA mov.w #TASSEL_2+MC_1,&TACTL ; SMCLK, clear TAR
;
Mainloop bis.w #CPUOFF,SR ; CPU off
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_11.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.1/TA0, Up Mode, 32kHz ACLK
;
; Description: Toggle P1.1 using hardware TA0 output. Timer_A is configured
; for up mode with CCR0 defining period, TA0 also output on P1.1. In this
; example, CCR0 is loaded with 10 and TA0 will toggle P.1.1 at TACLK/10.
; Thus the output frequency on P1.1 will be the TACLK/20. No CPU or
; software resources required. Normal operating mode is LPM3.
; As coded with TACLK = ACLK, P1.1 output frequency = 32768/20 = 1.6384kHz.
; ACLK = TACLK = 32kHz, MCLK = default DCO ~800kHz
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.1/TA0|--> ACLK/20
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #002h,&P1DIR ; P1.1 output
bis.b #002h,&P1SEL ; P1.1 option slect
SetupC0 mov.w #OUTMOD_4,&CCTL0 ; CCR0 toggle mode
mov.w #10-1,&CCR0 ;
SetupTA mov.w #TASSEL_1+MC_1,&TACTL ; ACLK, upmode
;
Mainloop bis.w #LPM3,SR ; Enter LPM3
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_13.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.1/TA0, Up/Down Mode, DCO SMCLK
;
; Description: Toggle P1.1 using hardware TA0 output. Timer_A is configured
; for up/down mode with CCR0 defining period, TA0 also output on P1.1. In
; this example, CCR0 is loaded with 250 and TA0 will toggle P1.1 at
; TACLK/2*250. Thus the output frequency on P1.1 will be the TACLK/1000.
; No CPU or software resources required.
; As coded with TACLK = SMCLK, P1.1 output frequency is ~1000000/1000.
; SMCLK = MCLK = TACLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.1/TA0|--> SMCLK/1000
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #002h,&P1DIR ; P1.1 output
bis.b #002h,&P1SEL ; P1.1 option slect
SetupC0 mov.w #OUTMOD_4,&CCTL0 ; CCR0 toggle mode
mov.w #250,&CCR0 ;
SetupTA mov.w #TASSEL_2+MC_3,&TACTL ; SMCLK, updown mode
;
Mainloop bis.w #CPUOFF,SR ; CPU off
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_14.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Toggle P1.1/TA0, Up/Down Mode, 32kHz ACLK
;
; Description: Toggle P1.1 using hardware TA0 output. Timer_A is configured
; for up/down mode with CCR0 defining period, TA0 also output on P1.1. In
; this example, CCR0 is loaded with 5 and TA0 will toggling P1.1 at
; TACLK/2*5. Thus the output frequency on P1.1 will be the TACLK/20.
; No CPU or software resources required. Normal operating mode is LPM3.
; As coded with TACLK = ACLK, P1.1 output frequency = 32768/20 = 1.6384kHz.
; ACLK = TACLK = 32kHz, MCLK = default DCO
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.1/TA0|--> ACLK/20
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #002h,&P1DIR ; P1.1 output
bis.b #002h,&P1SEL ; P1.1 option slect
SetupC0 mov.w #OUTMOD_4,&CCTL0 ; CCR0 toggle mode
mov.w #5,&CCR0 ;
SetupTA mov.w #TASSEL_1+MC_3,&TACTL ; ACLK, updown mode
;
Mainloop bis.w #LPM3,SR ; Enter LPM3
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_16.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, PWM TA1, Up Mode, DCO SMCLK
;
; Description: This program generates one PWM output on P1.2 using
; Timer_A configured for up mode. The value in CCR0, 512-1, defines the PWM
; period and the value in CCR1 the PWM duty cycles.
; A 75% duty cycle is on P1.2.
; ACLK = n/a, SMCLK = MCLK = TACLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.2/TA1|--> CCR1 - 75% PWM
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #00Ch,&P1DIR ; P1.2 and P1.3 output
bis.b #00Ch,&P1SEL ; P1.2 and P1.3 TA1/2 otions
SetupC0 mov.w #512-1,&CCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_7,&CCTL1 ; CCR1 reset/set
mov.w #384,&CCR1 ; CCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_2+MC_1,&TACTL ; SMCLK, upmode
;
Mainloop bis.w #CPUOFF,SR ; CPU off
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_17.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, PWM TA1, Up Mode, 32kHz ACLK
;
; Description: This program generates one PWM outputs on P1.2 using
; Timer_A configured for up mode. The value in CCR0, 512-1, defines the PWM
; period and the value in CCR1 the PWM duty cycle. Using 32kHz
; ACLK as TACLK, the timer period is 15.6ms with a 75% duty cycle on P1.2.
; Normal operating mode is LPM3.
; ACLK = TACLK = LFXT1 = 32768Hz, MCLK = default DCO ~800kHz.
; //* External watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.2/TA1|--> CCR1 - 75% PWM
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #00Ch,&P1DIR ; P1.2 and P1.3 outputs
bis.b #00Ch,&P1SEL ; P1.2 and P1.3 TA1/2 option
SetupC0 mov.w #512-1,&CCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_7,&CCTL1 ; CCR1 reset/set
mov.w #384,&CCR1 ; CCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_1+MC_1,&TACTL ; ACLK, upmode
;
Mainloop bis.w #LPM3,SR ; Remain in LPM3
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_19.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, PWM TA1, Up/Down Mode, DCO SMCLK
;
; Description: This program generates one PWM output on P1.1 using
; Timer_A configured for up/down mode. The value in CCR0, 128, defines
; the PWM period/2 and the value in CCR1 the PWM duty cycle.
; A 75% duty cycle is on P1.2.
; SMCLK = MCLK = TACLK = default DCO .
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.2/TA1|--> CCR1 - 75% PWM
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #00Ch,&P1DIR ; P1.2 and P1.3 output
bis.b #00Ch,&P1SEL ; P1.2 and P1.3 TA1/2 otions
SetupC0 mov.w #128,&CCR0 ; PWM Period/2
SetupC1 mov.w #OUTMOD_6,&CCTL1 ; CCR1 toggle/set
mov.w #32,&CCR1 ; CCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_2+MC_3,&TACTL ; SMCLK, updown mode
;
Mainloop bis.w #CPUOFF,SR ; CPU off
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_20.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, PWM TA1-2, Up/Down Mode, 32kHz ACLK
;
; Description: This program generates one PWM output on P1.2 using
; Timer_A configured for up/down mode. The value in CCR0, 128, defines
; the PWM period/2 and the value in CCR1 the PWM duty cycle.
; Using 32kHz ACLK as TACLK, the timer period is 7.8ms with a 75% duty
; cycle on P1.2. Normal operating mode is LPM3.
; ACLK = TACLK = LFXT1 = 32768Hz, MCLK = default DCO.
; //* External watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.2/TA1|--> CCR1 - 75% PWM
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #00Ch,&P1DIR ; P1.2 and P1.3 output
bis.b #00Ch,&P1SEL ; P1.2 and P1.3 TA1/2 otions
SetupC0 mov.w #128,&CCR0 ; PWM Period/2
SetupC1 mov.w #OUTMOD_6,&CCTL1 ; CCR1 toggle/set
mov.w #32,&CCR1 ; CCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_1+MC_3,&TACTL ; ACLK, updown mode
;
Mainloop bis.w #LPM3,SR ; Enter LPM3
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_ta_uart2400.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Timer_A, Ultra-Low Pwr UART 2400 Echo, 32kHz ACLK
;
; Description: Use Timer_A CCR0 hardware output modes and SCCI data latch
; to implement UART function @ 2400 baud. Software does not directly read and
; write to RX and TX pins, instead proper use of output modes and SCCI data
; latch are demonstrated. Use of these hardware features eliminates ISR
; latency effects as hardware insures that output and input bit latching and
; timing are perfectly synchronised with Timer_A regardless of other
; software activity. In the Mainloop the UART function readies the UART to
; receive one character and waits in LPM3 with all activity interrupt driven.
; After a character has been received, the UART receive function forces exit
; from LPM3 in the Mainloop which echo's back the received character.
; ACLK = TACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO
; //* An external watch crystal is required on XIN XOUT for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | CCI0B/TXD/P1.5|-------->
; | | 2400 8N1
; | CCI0A/RXD/P1.1|<--------
;
RXD .equ 002h ; RXD on P1.1
TXD .equ 020h ; TXD on P1.5
;
; CPU Registers Used
RXTXData .equ R4
BitCnt .equ R5
;
; Conditions for 2400 Baud SW UART, ACLK = 32768
Bitime_5 .equ 6 ; ~0.5 bit length + small adjustment
Bitime .equ 14 ; 427us bit length ~ 2341 baud
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop Watchdog Timer
SetupTA mov.w #TASSEL_1+MC_2,&TACTL ; ACLK, continuous mode
SetupC0 mov.w #OUT,&CCTL0 ; TXD Idle as Mark
SetupP1 bis.b #TXD+RXD,&P1SEL ;
bis.b #TXD,&P1DIR ;
;
Mainloop call #RX_Ready ; UART ready to RX one Byte
bis.w #LPM3+GIE,SR ; Enter LPM3 w/ int until Byte RXed
call #TX_Byte ; TX Back RXed Byte Received
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
TX_Byte ; Subroutine Transmits Character from RXTXData Buffer
;-------------------------------------------------------------------------------
TX_1 mov.w &TAR,&CCR0 ; Current state of TA counter
cmp.w &TAR,&CCR0 ; !!Prevent async capature!!
jne TX_1 ;
add.w #Bitime,&CCR0 ; Some time till first bit
bis.w #0100h, RXTXData ; Add mark stop bit to RXTXData
rla.w RXTXData ; Add space start bit
mov.w #10,BitCnt ; Load Bit counter, 8data + ST/SP
mov.w #CCIS0+OUTMOD0+CCIE,&CCTL0 ; TXD = mark = idle
TX_Wait bit.w #CCIE,&CCTL0 ; Wait for TX completion
jnz TX_Wait ;
ret ;
;
;-------------------------------------------------------------------------------
RX_Ready ; Subroutine Readies UART to Receive Character into RXTXData Buffer
;-------------------------------------------------------------------------------
mov.w #8,BitCnt ; Load Bit Counter, 8 data bits
SetupRX mov.w #CM1+SCS+OUTMOD0+CAP+CCIE,&CCTL0 ; Neg Edge,Sync,cap
ret ;
;
;-------------------------------------------------------------------------------
TA0_ISR ; RXTXData Buffer holds UART Data
;-------------------------------------------------------------------------------
add.w #Bitime,&CCR0 ; Time to next bit
bit.w #CCIS0,&CCTL0 ; RX on CCI0B?
jnz UART_TX ; Jump --> TX
UART_RX bit.w #CAP,&CCTL0 ; Capture mode = start bit edge
jz RX_Bit ; Start bit edge?
RX_Edge bic.w #CAP,&CCTL0 ; Switch to compare mode
add.w #Bitime_5,&CCR0 ; First databit 1.5 bits from edge
reti ;
RX_Bit bit.w #SCCI,&CCTL0 ; Get bit waiting in receive latch
rrc.b RXTXData ; Store received bit
RX_Test dec.w BitCnt ; All bits RXed?
jnz RX_Next ; Next bit?
;>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
RX_Comp bic.w #CCIE,&CCTL0 ; All bits RXed, disable interrupt
mov.w #GIE,0(SP) ; Decode byte = active in Mainloop
;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
RX_Next reti ;
;
UART_TX cmp.w #00h,BitCnt ;
jne TX_Next ; Next bit?
bic.w #CCIE,&CCTL0 ; All Bits TX or RX, Disable Int.
reti ;
TX_Next bic.w #OUTMOD2,&CCTL0 ; TX Mark
rra.w RXTXData ; LSB is shifted to carry
jc TX_Test ; Jump --> bit = 1
TX_Space bis.w #OUTMOD2,&CCTL0 ; TX Space
TX_Test dec.w BitCnt ; All bits sent (or received)?
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_01.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - USICNT Used as a One-Shot Timer Function, DCO SMCLK
;
; Description: USI conunter is used as a one-shot timer. The USI
; conunter ISR toggles P1.0 using software. As coded ACLK is pre-divided by
; 128 and the USICNT loaded with 32, for a total divided of 4096 or
; 12-bits. USICNT must be reloaded after each interrupt which also clears
; interrupt flag.
; ACLK = VLO, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
SetupP1 bis.b #01h,&P1DIR ; P1.1 output direction
SetupBC bis.b #LFXT1S_2,&BCSCTL1 ; ACLK = VL0
SetupUSI bis.b #USIMST,&USICTL0 ; SPI master
bis.b #USIIE,&USICTL1 ; Counter interrupt, flag remains
mov.b #USIDIV_7+USISSEL_1,&USICKCTL ; /128 ACLK
bic.b #USISWRST,&USICTL0 ; Enable USI
mov.b #08h,&USICNT ; init-load counter
;
Mainloop bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
USI_ISR ;
;-------------------------------------------------------------------------------
xor.b #01h,&P1OUT ; Toggle P1.0
bis.b #01Fh,&USICNT ; re-load counter
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int04" ; USI Vector
.short USI_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_02.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;******************************************************************************
; MSP430F20x2/3 Demo - SPI full-Duplex 3-wire Master
;
; Description: SPI Master communicates full-duplex with SPI Slave using
; 3-wire mode. The level on P1.4 is TX'ed and RX'ed to P1.0.
; Master will pulse slave P1.2 which resets USICNT counter for synch start.
; ACLK = n/a, MCLK = SMCLK = Default DCO
; *******THIS IS MASTER CODE******
; Slave Master
; MSP430F20x2/3 MSP430F20x2/3
; ----------------- -----------------
; | XIN|- /|\| XIN|-
; | | | | |
; | XOUT|- --|RST XOUT|-
; | | /|\ | |
; | RST/NMI|--+<----|P1.2 |
; LED <-|P1.0 | | P1.4|<-
; ->|P1.4 | | P1.0|-> LED
; | SDI/P1.7|<-------|P1.6/SDO |
; | SDO/P1.6|------->|P1.7/SDI |
; | SCLK/P1.5|<-------|P1.5/SCLK |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
SetupP1 mov.b #010h,&P1OUT ; P1.4 set, else
bis.b #010h,&P1REN ; P1.4 pullup
bis.b #001h,&P1DIR ;
SetupUSI bis.b #USIPE7+USIPE6+USIPE5+USIMST+USIOE,&USICTL0; Port, SPI master
bis.b #USIIE,&USICTL1 ; Counter interrupt, flag remains
mov.b #USIDIV_4+USISSEL_2,&USICKCTL ; /16 SMCLK
bic.b #USISWRST,&USICTL0 ; Enable USI
mov.b &P1IN,&USISRL ; init-load TX data
ResetSlave bis.b #004h,&P1DIR ; Reset Slave
bic.b #004h,&P1DIR ;
clr.w R4 ; Delay for Slave
Delay dec.w R4 ;
jnz Delay ;
mov.b #08h,&USICNT ; init-load counter, clear flag
;
Mainloop bis.b #LPM0+GIE,SR ; CPU off w/ interrupts enabled
nop ; Required for debugger only
;
;------------------------------------------------------------------------------
USI_ISR;
;------------------------------------------------------------------------------
mov.b &USISRL,R4 ; Temp save RX'ed char
mov.b &P1IN,&USISRL ;
bic.b #01h,&P1OUT ;
bit.b #010h,R4 ;
jnc L2 ;
L1 bis.b #01h,&P1OUT ;
L2 mov.b #08h,&USICNT ; re-load counter, clear flag
reti ; Exit ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int04" ; USI Vector
.short USI_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_03.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;******************************************************************************
; MSP430F20x2/3 Demo - SPI full-Duplex 3-wire Slave
;
; Description: SPI Master communicates full-duplex with SPI Slave using
; 3-wire mode. The level on P1.4 is TX'ed and RX'ed to P1.0.
; Master will pulse slave reset for synch start.
; ACLK = n/a, MCLK = SMCLK = Default DCO
;
; Slave Master
; MSP430F20x2/3 MSP430F20x2/3
; ----------------- -----------------
; | XIN|- /|\| XIN|-
; | | | | |
; | XOUT|- --|RST XOUT|-
; | | /|\ | |
; | RST/NMI|--+<----|P1.2 |
; LED <-|P1.0 | | P1.4|<-
; ->|P1.4 | | P1.0|-> LED
; | SDI/P1.7|<-------|P1.6/SDO |
; | SDO/P1.6|------->|P1.7/SDI |
; | SCLK/P1.5|<-------|P1.5/SCLK |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
SetupP1 mov.b #010h,&P1OUT ; P1.4 set, else
bis.b #010h,&P1REN ; P1.4 pullup
bis.b #001h,&P1DIR ;
SetupUSI bis.b #USIPE7+USIPE6+USIPE5+USIOE,&USICTL0; Port, SPI slave
bis.b #USIIE,&USICTL1 ; Counter interrupt, flag remains
bic.b #USISWRST,&USICTL0 ; Enable USI
mov.b &P1IN,&USISRL ; init-load TX data
mov.b #08h,&USICNT ; init-load counter, clear flag
;
Mainloop bis.b #LPM4+GIE,SR ; LPM4 w/ interrupts enabled
nop ; Required for debugger only
;
;------------------------------------------------------------------------------
USI_ISR;
;------------------------------------------------------------------------------
mov.b &USISRL,R4 ; Temp save RX'ed char
mov.b &P1IN,&USISRL ;
mov.b #08h,&USICNT ; re-load counter, clear flag
bic.b #01h,&P1OUT ;
bit.b #010h,R4 ;
jnc L2 ;
L1 bis.b #01h,&P1OUT ;
L2 reti ; Exit ISR
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int04" ; USI Vector
.short USI_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_04.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - USI SPI Interface to HC165/164 Shift Registers
;
; Description: Demonstrate USI in two-way SPI mode. Data are read from
; an HC165, and same data written back to the HC164.
; ACLK = n/a MCLK = SMCLK = Default DCO, USI = SMCLK/2
;
; MSP430F20x2/3
; -----------------
; /|\| XIN|-
; | | | ^ HC164
; HC165 --|RST XOUT|- | -------------
; ---------- | | |-|/CLR,B | 8
; 8 | /LD|<---|P1.1 SIMO0/P1.6|------>|A Qx|--\->
; -\->|A-H CLK|<---|P1.5/SCLK - P1.5|------>|CLK |
; |-|INH QH|--->|P1.7/SOMI | | |
; |-|SER | | | | |
; - | | | | | |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
SetupP1 bis.b #02h,&P1OUT ;
bis.b #02h,&P1DIR ;
SetupUSI bis.b #USIPE7+USIPE6+USIPE5+USIMST+USIOE,&USICTL0; Port, SPI master
bis.b #USICKPH+USIIE,&USICTL1 ; Counter interrupt, flag remains
mov.b #USIDIV_1+USISSEL_2,&USICKCTL ; /2 SMCLK
bic.b #USISWRST,&USICTL0 ; Enable USI
mov.b #08h,&USICNT ; init-load counter, clears flag
;
Mainloop call #RXTX_HC16x ; Exchange data
Delay push.w #0 ; Software delay
D1 dec.w 0(SP) ;
jnz D1 ;
incd.w SP ;
jmp Mainloop ; Repeat
;
;-------------------------------------------------------------------------------
RXTX_HC16x; HC165--> URXBUF0 UTXBUF0 --> HC164
;-------------------------------------------------------------------------------
TX0 bit.b #USIIFG,&USICTL1 ; USART0 TX buffer ready?
jz TX0 ; Jump --> TX buffer not ready
bic.b #02h,&P1OUT ; Latch data into 'HC165
bis.b #02h,&P1OUT ;
; ******************** ; Read data are ready to be written
mov.b #08h,&USICNT ; Load counter, clears flag
ret ; Return from subroutine
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_05.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2/3 Demo - USI SPI Interface to TLC549 8-bit ADC
;
; Description: This program demonstrate a USI in SPI mode interface to a
; TLC549 8-bit ADC. If AIN > 0.5(REF+ - REF-), P1.0 set, else reset.
; ACLK = n/a, MCLK = SMCLK = default DCO, UCICLK = SMCLK/4
; //** VCC must be at least 3v for TLC549 **//
;
; MSP430F20x2/3
; -----------------
; /|\| XIN|-
; TLC549 | | |
; ------------- --|RST XOUT|-
; | CS|<---|P1.1 |
; | DATAOUT|--->|P1.7/SOMI P1.0|-->LED
; ~>|AIN I/O CLK|<---|P1.5/UCLK0 |
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
SetupP1 clr.b &P1OUT ;
bis.b #03h,&P1DIR ; P1.0/1 output direction
SetupUSI bis.b #USIPE7+USIPE5+USIMST+USIOE,&USICTL0; Port, SPI master
bis.b #USIIE,&USICTL1 ; Counter interrupt, flag remains
mov.b #USIDIV_2+USISSEL_2,&USICKCTL ; /4 SMCLK
bic.b #USISWRST,&USICTL0 ; Enable USI
mov.b #08h,&USICNT ; init-load counter, clears flag
;
Mainloop bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
USI_ISR ;
;-------------------------------------------------------------------------------
bis.b #02h,&P1OUT ; Disable TLC549
cmp.b #07Fh,&USISRL ;
bic.b #01h,&P1OUT ;
jlo USI_ISR1 ;
bis.b #01h,&P1OUT ;
USI_ISR1 bic.b #02h,&P1OUT ; Enable TLC549
mov.b #08h,&USICNT ; re-load counter
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int04" ; USI Vector
.short USI_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_06.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;******************************************************************************
; MSP430F20xx Demo - I2C Master Receiver, single byte
;
; Description: I2C Master communicates with I2C Slave using
; the USI. Slave data should increment from 0x00 with each transmitted byte
; which is verified by the Master.
; LED off for address or data Ack; LED on for address or data NAck.
; ACLK = n/a, MCLK = SMCLK = Calibrated 1MHz
;
; ***THIS IS THE MASTER CODE***
;
; Slave Master
; (msp430x20x3_usi_09.asm)
; MSP430F20x2/3 MSP430F20x2/3
; ----------------- -----------------
; /|\| XIN|- /|\| XIN|-
; | | | | | |
; --|RST XOUT|- --|RST XOUT|-
; | | | |
; LED <-|P1.0 | | |
; | | | P1.0|-> LED
; | SDA/P1.7|------->|P1.7/SDA |
; | SCL/P1.6|<-------|P1.6/SCL |
;
; Note: internal pull-ups are used in this example for SDA & SCL
;
; P. Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;******************************************************************************
I2CState .equ R4
slav_data .equ R5
slav_add .equ R6
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
CheckCal cmp.b #0xFF,&CALBC1_1MHZ ; Check calibration constant
jne Load ; if not erased, load.
Trap jmp Trap ; if erased do not load, trap CPU!
Load clr.b &DCOCTL ; Select lowest DCOx and MODx settings
mov.b &CALBC1_1MHZ,&BCSCTL1 ; Set DCO to 1MHz
mov.b &CALDCO_1MHZ,&DCOCTL
SetupP1 mov.b #0xC0,&P1OUT ; P1.6&P1.7 Pullups
bis.b #0xC0,&P1REN ; P1.6&P1.7 Pullups
mov.b #0xFF,&P1DIR ; unused pins as output
SetupP2 clr.b &P2OUT
mov.b #0xFF,&P2DIR
SetupUSI mov.b #USIPE6+USIPE7+USIMST+USISWRST,&USICTL0; Port, I2C master
mov.b #USIIE+USII2C,&USICTL1 ; Enable I2C
mov.b #USIDIV_3+USISSEL_2+USICKPL,&USICKCTL ; SMCLK/8
bis.b #USIIFGCC,&USICNT ; Disable automatic clear control
bic.b #USISWRST,&USICTL0 ; Enable USI
bic.b #USIIFG,&USICTL1 ; Clear pending flag
clr.w I2CState
clr.b slav_data
mov.b #0x91,slav_add
Mainloop bis.b #USIIFG,&USICTL1
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
call #Delay
jmp Mainloop
;------------------------------------------------------------------------------
USI_ISR ;
;------------------------------------------------------------------------------
add.w I2CState,PC ; I2C State Machine
jmp STATE0
jmp STATE2
jmp STATE4
jmp STATE6
jmp STATE8
jmp STATE10
STATE0
bis.b #0x01,&P1OUT ; LED on: sequence start
clr.b &USISRL ; Generate start condition
bis.b #USIGE+USIOE,&USICTL0 ;
bic.b #USIGE,&USICTL0 ; & send address to slave
mov.b slav_add,&USISRL ; and transmit address R/W =1
mov.b &USICNT,R8 ; Bit counter = 8, Tx adress
and.b #0xE0,R8
add.b #0x08,R8
mov.b R8,&USICNT
mov.w #2,I2CState ; Go to next state rx address (N)ACK
bic.b #USIIFG,&USICTL1 ; clear pending flag
reti
STATE2 ; Rx address (N)Ack bit
bic.b #USIOE,&USICTL0 ; SDA = input
bis.b #0x01,&USICNT ; Bit counter = 1, rx (N)ACK
mov.w #4,I2CState ; Go to next state, chk (N)ACK
bic.b #USIIFG,&USICTL1
reti
STATE4 ; Process Address (N)ack, data Rx
bit.b #0x01,&USISRL ; if NACK received
jnc Data_Rx ;
bis.b #USIOE,&USICTL0 ;
clr.b &USISRL
bis.b #0x01,&USICNT ; bit counter = 1, SCL high,SDA low
mov.w #10,I2CState ; go to next state, generate stop
bis.b #0x01,&P1OUT ; Turn on LED : error
bic.b #USIIFG,&USICTL1
reti
Data_Rx
bis.b #8,&USICNT ; bit counter = 8, Rx data
mov.w #6,I2CState ; next state: Test data, (N)ACK
bic.b #0x1,&P1OUT ; LED off
bic.b #USIIFG,&USICTL1
reti
STATE6 ; Send Data (N)Ack bit
bis.b #USIOE,&USICTL0 ; SDA = output
cmp.b slav_data,&USISRL ; if data valid
jnz Data_NACK ; data invalid , goto NACK loop
clr.b &USISRL ; send ACK
inc.b slav_data ; Increment slave data
bic.b #0x01,&P1OUT ; LED off
jmp STATE6_Exit
Data_NACK
mov.b #0xFF,&USISRL ; Send NACK
bis.b #0x1,&P1OUT ; LED on:error
STATE6_Exit
bis.b #0x1,&USICNT ; Bit counter = 1, send NACK bit
mov.w #8,I2CState ; go to next state, prep stop
bic.b #USIIFG,&USICTL1
reti
STATE8 ; Pre stop condition
bis.b #USIOE,&USICTL0 ; SDA =output
clr.b &USISRL
bis.b #0x01,&USICNT ; Bit counter = 1, SCL high,SDA low
mov.w #10,I2CState ; go to next state, generate stop
bic.b #USIIFG,&USICTL1
reti
STATE10
mov.b #0xFF,&USISRL ; USISRL=1 to release SDA
bis.b #USIGE,&USICTL0 ; Transparent latch enabled
bic.b #USIGE+USIOE,&USICTL0 ; Latch/SDA output disabled
clr.w I2CState ; Reset state machine for next Tx
bic.w #LPM0,0(SP) ; Exit active for next transfer
bic.b #USIIFG,&USICTL1
reti
;------------------------------------------------------------------------------
Delay
;------------------------------------------------------------------------------
mov.w #0xFFFF,R7 ; Delay betn. communication cycles
DL1 dec.w R7
jnz DL1
ret
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int04" ; USI Vector
.short USI_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_07.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;******************************************************************************
; MSP430F20xx Demo - I2C Master Transmitter, single byte
;
; Description: I2C Master communicates with I2C Slave using
; the USI. Master data is sent and increments from 0x00 with each transmitted
; byte which is verified by the slave.
; LED off for address or data Ack; LED on for address or data NAck.
; ACLK = n/a, MCLK = SMCLK = Calibrated 1MHz
;
; ***THIS IS THE MASTER CODE***
;
; Slave Master
; (msp430x20x3_usi_08.asm)
; MSP430F20x2/3 MSP430F20x2/3
; ----------------- -----------------
; /|\| XIN|- /|\| XIN|-
; | | | | | |
; --|RST XOUT|- --|RST XOUT|-
; | | | |
; LED <-|P1.0 | | |
; | | | P1.0|-> LED
; | SDA/P1.7|<-------|P1.7/SDA |
; | SCL/P1.6|<-------|P1.6/SCL |
;
; Note: internal pull-ups are used in this example for SDA & SCL
;
; P. Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;******************************************************************************
I2CState .equ R4
MST_data .equ R5
slav_add .equ R6
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
CheckCal cmp.b #0xFF,&CALBC1_1MHZ ; Check calibration constants
jne Load ; if not erased, load.
Trap jmp Trap ; if erased do not load, trap CPU!
Load clr.b &DCOCTL ; Select lowest DCOx and MODx settings
mov.b &CALBC1_1MHZ,&BCSCTL1 ; Set DCO to 1MHz
mov.b &CALDCO_1MHZ,&DCOCTL
SetupP1 mov.b #0xC0,&P1OUT ; P1.6 & P1.7 as pullups
bis.b #0xC0,&P1REN ; P1.6 & P1.7 as pullups
mov.b #0xFF,&P1DIR ; unused pins as output
SetupP2 mov.b #0x00,&P2OUT
mov.b #0xFF,&P2DIR
SetupUSI mov.b #USIPE6+USIPE7+USIMST+USISWRST,&USICTL0; Port, I2C master
mov.b #USIIE+USII2C,&USICTL1 ; Enable I2C
mov.b #USIDIV_3+USISSEL_2+USICKPL,&USICKCTL ; SMCLK/8
bis.b #USIIFGCC,&USICNT ; Disable automatic clear control
bic.b #USISWRST,&USICTL0 ; Enable USI
bic.b #USIIFG,&USICTL1 ; Clear pending flag
clr.w I2CState
clr.b MST_data
mov.b #0x90,slav_add
Mainloop bis.b #USIIFG,&USICTL1
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
call #Delay
jmp Mainloop
;------------------------------------------------------------------------------
USI_ISR ;
;------------------------------------------------------------------------------
add.w I2CState,PC ; I2C State Machine
jmp STATE0
jmp STATE2
jmp STATE4
jmp STATE6
jmp STATE8
jmp STATE10
STATE0
bis.b #0x01,&P1OUT ; LED on: sequence start
clr.b &USISRL ; Generate start condition
bis.b #USIGE+USIOE,&USICTL0 ;
bic.b #USIGE,&USICTL0 ;
mov.b slav_add,&USISRL ; Transmit address, R/W =0
mov.b &USICNT,R8 ; Bit counter = 8, Tx address
and.b #0xE0,R8
add.b #0x08,R8
mov.b R8,&USICNT
mov.w #2,I2CState ; Go to next state: Rx address(N)ACK
bic.b #USIIFG,&USICTL1
reti
STATE2 ; Rx address
bic.b #USIOE,&USICTL0 ; SDA = input
bis.b #0x01,&USICNT ; Bit counter = 1, rx (N)ACK
mov.w #4,I2CState ; Go to next state, chk (N)ACK
bic.b #USIIFG,&USICTL1
reti
STATE4 ; Process address (N)Ack, data Tx
bis.b #USIOE,&USICTL0 ; SDA = output
bit.b #0x1,&USISRL ; if NACK received
jnc Data_Tx ; ACK
clr.b &USISRL
bis.b #0x01,&USICNT ; bit counter = 1, SCL high,SDA low
mov.w #10,I2CState ; goto next state, generate stop
bis.b #0x01,&P1OUT ; Turn on LED : error
bic.b #USIIFG,&USICTL1
reti
Data_Tx
mov.b MST_data,&USISRL
bis.b #0x8,&USICNT ; Bit counter = 8, Rx data
mov.w #6,I2CState ; next state: Test data, (N)ACK
bic.b #0x1,&P1OUT ; LED off
bic.b #USIIFG,&USICTL1
reti
STATE6 ; Receive Data Ack/Nack bit
bic.b #USIOE,&USICTL0 ; SDA = input
bis.b #0x01,&USICNT ; Bit counter = 1, receive (N)Ack bit
mov.w #8,I2CState ; Go to next state: check (N)Ack
bic.b #USIIFG,&USICTL1
reti
STATE8 ; Process data (N)Ack bit
bis.b #USIOE,&USICTL0
bit.b #0x01,&USISRL ; if NACK received
jz Data_Ack
bis.b #0x1,&P1OUT ; LED on:error ; nack
jmp STATE8_Exit
Data_Ack
inc.b MST_data ; Increment Master data
bic.b #0x1,&P1OUT ; LED off
STATE8_Exit
clr.b &USISRL
bis.b #0x1,&USICNT ; Bit counter = 1, SCL high,SDA low
mov.w #10,I2CState ; Go to next state : generate stop
bic.b #USIIFG,&USICTL1
reti
STATE10
mov.b #0xFF,&USISRL ; USISRL=1 to release SDA
bis.b #USIGE,&USICTL0 ; Transparent latch enabled
bic.b #USIGE+USIOE,&USICTL0 ; Latch/SDA output disabled
clr.w I2CState ; Reset state machine for next Tx
bic.w #LPM0,0(SP) ; Exit active for next transfer
bic.b #USIIFG,&USICTL1
reti
;-------------------------------------------------------------------------------
Delay ; Delay betn. communication cycles
;-------------------------------------------------------------------------------
mov.w #0xFFFF,R7
DL1 dec.w R7
jnz DL1
ret
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int04" ; USI Vector
.short USI_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_08.asm
Executable
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@@ -0,0 +1,197 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;******************************************************************************
; MSP430F20xx Demo - I2C Slave Receiver, single byte
;
; Description: I2C Slave communicates with I2C Master using
; the USI. Master data should increment from 0x00 with each transmitted byte
; which is verified by the slave.
; LED off for address or data Ack; LED on for address or data NAck.d by the slave.
; ACLK = n/a, MCLK = SMCLK = Calibrated 1MHz
;
; ***THIS IS THE SLAVE CODE***
;
; Slave Master
; (msp430x20x3_usi_07.asm)
; MSP430F20x2/3 MSP430F20x2/3
; ----------------- -----------------
; /|\| XIN|- /|\| XIN|-
; | | | | | |
; --|RST XOUT|- --|RST XOUT|-
; | | | |
; LED <-|P1.0 | | |
; | | | P1.0|-> LED
; | SDA/P1.7|<-------|P1.7/SDA |
; | SCL/P1.6|<-------|P1.6/SCL |
;
; Note: internal pull-ups are used in this example for SDA & SCL
;
; P. Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;******************************************************************************
I2CState .equ R4
MST_data .equ R5
slav_add .equ R6
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
CheckCal cmp.b #0xFF,&CALBC1_1MHZ ; Check calibration constants
jne Load ; if not erased, load.
Trap jmp Trap ; if erased do not load, trap CPU!
Load clr.b &DCOCTL ; Select lowest DCOx and MODx settings
mov.b &CALBC1_1MHZ,&BCSCTL1 ; Set DCO to 1MHz
mov.b &CALDCO_1MHZ,&DCOCTL
SetupP1 mov.b #0xC0,&P1OUT ; P1.6 &P1.7 pullups
bis.b #0xC0,&P1REN ; P1.6 &P1.7 pullups
mov.b #0xFF,&P1DIR ; unused pins output direction
SetupP2 clr.b &P2OUT ;
mov.b #0xFF,&P2DIR
SetupUSI mov.b #USIPE6+USIPE7+USISWRST,&USICTL0; Port, I2C slave
mov.b #USIIE+USII2C+USISTTIE,&USICTL1 ;Enable I2C mode,interrupts
mov.b #USICKPL,&USICKCTL ; Setup clock polarity
bis.b #USIIFGCC,&USICNT
bic.b #USISWRST,&USICTL0
bic.b #USIIFG,&USICTL1
clr.w I2CState
clr.w MST_data
mov.b #0x90,slav_add
Mainloop
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
jmp Mainloop
;-------------------------------------------------------------------------------
USI_ISR ;
;-------------------------------------------------------------------------------
bit.b #USISTTIFG,&USICTL1 ; Start entry?
jnc Check_State
bis.b #0x01,&P1OUT ; turn on LED, sequence start
mov.w #2,I2CState ; First I2C state, Rx address
Check_State add.w I2CState,PC ; I2C State Machine
jmp STATE0
jmp STATE2
jmp STATE4
jmp STATE6
jmp STATE8
jmp STATE10
STATE0 nop ; Idle, should not get here
bic.b #USIIFG,&USICTL1
reti
STATE2 ; Rx address
mov.b &USICNT,R8 ; Bit counter = 8, Rx address
and.b #0xE0,R8
add.b #0x8,R8
mov.b R8,&USICNT
bic.b #USISTTIFG,&USICTL1 ; Clear Start flag
mov.w #4,I2CState ; Go to next state, chk address
bic.b #USIIFG,&USICTL1
reti
STATE4 ; Process address and send (N)Ack
bit.b #0X01,&USISRL ; If read
jnc Chk_Add
inc.b slav_add ; Save R/W bit
Chk_Add
bis.b #USIOE,&USICTL0 ; SDA = output
cmp.b slav_add,&USISRL ; address match?
jnz Add_NACK
clr.b &USISRL
bic.b #0x01,&P1OUT ; LED off
mov.w #8,I2CState ; Go to next state: Rx data
bis.b #0x01,&USICNT ; Bit counter = 1, send Ack bit
bic.b #USIIFG,&USICTL1
reti
Add_NACK
mov.b #0xFF,&USISRL ; Send NACK
bis.b #0x1,&P1OUT ; LED on:error
mov.w #6,I2CState ; go to next state, prep next start
bis.b #0x01,&USICNT ; Bit counter = 1, Send Nack
bic.b #USIIFG,&USICTL1
reti
STATE6 ; Prep for Re-start condition
bic.b #USIOE,&USICTL0 ; SDA = input
mov.b #0x90,slav_add ; Reset Slave address
clr.w I2CState ; Reset state machine
bic.b #USIIFG,&USICTL1
reti
STATE8 ; Receive data byte
bic.b #USIOE,&USICTL0 ; SDA =input
bis.b #0x8,&USICNT ; Bit counter = 8, Rx data
mov.w #10,I2CState ; Go to next state,test data,(N)Ack
bic.b #USIIFG,&USICTL1
reti
STATE10 ; Check Data and Tx (N)Ack
bis.b #USIOE,&USICTL0 ; SDA = output
cmp.b MST_data,&USISRL ; If data valid ...
jne Data_NACK
clr.b &USISRL ; Send Ack
inc.b MST_data ; Increment master data
bic.b #0x1,&P1OUT ; LED off
jmp STATE10_Exit
Data_NACK
mov.b #0xFF,&USISRL ; Send Nack
bis.b #0x1,&P1OUT ; LED on : error
STATE10_Exit
bis.b #0x1,&USICNT ; Bit counter = 1, Send Nack
mov.w #6,I2CState ; next state, prep for next start
bic.b #USIIFG,&USICTL1
reti
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int04" ; USI Vector
.short USI_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_usi_09.asm
Executable
+203
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@@ -0,0 +1,203 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;******************************************************************************
; MSP430F20xx Demo - I2C Slave Transmitter, single byte
;
; Description: I2C Slave communicates with I2C Master using
; the USI. Slave data is sent and increments from 0x00 with each transmitted
; byte which is verified by the Master.
; LED off for address or data Ack; LED on for address or data NAck.
; ACLK = n/a, MCLK = SMCLK = Calibrated 1MHz
;
; ***THIS IS THE SLAVE CODE***
;
; Slave Master
; (msp430x20x3_usi_06.asm)
; MSP430F20x2/3 MSP430F20x2/3
; ----------------- -----------------
; /|\| XIN|- /|\| XIN|-
; | | | | | |
; --|RST XOUT|- --|RST XOUT|-
; | | | |
; LED <-|P1.0 | | |
; | | | P1.0|-> LED
; | SDA/P1.7|------->|P1.7/SDA |
; | SCL/P1.6|<-------|P1.6/SCL |
;
; Note: internal pull-ups are used in this example for SDA & SCL
;
; P. Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;******************************************************************************
I2CState .equ R4
slav_data .equ R5
slav_add .equ R6
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
CheckCal cmp.b #0xFF,&CALBC1_1MHZ ; Check calibration constants
jne Load ; if not erased, load.
Trap jmp Trap ; if erased do not load, trap CPU!
Load clr.b &DCOCTL ; Select lowest DCOx and MODx settings
mov.b &CALBC1_1MHZ,&BCSCTL1 ; Set DCO to 1MHz
mov.b &CALDCO_1MHZ,&DCOCTL
SetupP1 mov.b #0xC0,&P1OUT ; P1.6 & P1.7 as pullups
bis.b #0xC0,&P1REN ; P1.6 & P1.7 as pullups
mov.b #0xFF,&P1DIR ; unused pins output direction
SetupP2 clr.b &P2OUT ;
mov.b #0xFF,&P2DIR
SetupUSI mov.b #USIPE6+USIPE7+USISWRST,&USICTL0; Port, I2C slave
mov.b #USIIE+USII2C+USISTTIE,&USICTL1 ;Enable I2C mode,interrupts
mov.b #USICKPL,&USICKCTL ; Setup clock polarity
bis.b #USIIFGCC,&USICNT ; Disable automatic clear control
bic.b #USISWRST,&USICTL0 ; Enable USI
bic.b #USIIFG,&USICTL1 ; Clear pending flag
clr.w I2CState
clr.b slav_data
mov.b #0x90,slav_add
Mainloop
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
jmp Mainloop
;-------------------------------------------------------------------------------
USI_ISR
;-------------------------------------------------------------------------------
bit.b #USISTTIFG,&USICTL1 ; Start entry?
jnc Check_State
bis.b #0x01,&P1OUT ; turn on LED, sequence start
mov.w #2,I2CState ; First I2C state, Rx address
Check_State add.w I2CState,PC ; I2C State Machine
jmp STATE0
jmp STATE2
jmp STATE4
jmp STATE6
jmp STATE8
jmp STATE10
jmp STATE12
STATE0 nop ; Idle, should not get here
bic.b #USIIFG,&USICTL1
reti
STATE2 ; Receive slave address
mov.b &USICNT,R8 ; Bit counter = 8, Rx address
and.b #0xE0,R8
add.b #0x8,R8
mov.b R8,&USICNT
bic.b #USISTTIFG,&USICTL1 ; Clear Start flag
mov.w #4,I2CState ; Go to next state, chk address
bic.b #USIIFG,&USICTL1
reti
STATE4 ; Process address and send (N)ack
bit.b #0X01,&USISRL ; If read
jnc Chk_Add
inc.b slav_add ; Save R/W bit
Chk_Add
bis.b #USIOE,&USICTL0 ; SDA = output
cmp.b slav_add,&USISRL ; address match?
jnz Add_NACK
clr.b &USISRL ; Send ack
bic.b #0x01,&P1OUT ; LED off
mov.w #8,I2CState ; Go to next state: Tx data
bis.b #0x01,&USICNT ; Send Ack bit
bic.b #USIIFG,&USICTL1
reti
Add_NACK
mov.b #0xFF,&USISRL ; Send NACK
bis.b #0x1,&P1OUT ; LED on:error
mov.w #6,I2CState ; Go to next state, prep stop
bis.b #0x01,&USICNT ; Bit counter = 1, Send Nack
bic.b #USIIFG,&USICTL1
reti
STATE6 ; Prep for start condition
bic.b #USIOE,&USICTL0 ; SDA = input
mov.b #0x90,slav_add ; Reset Slave address
clr.w I2CState ; Reset state machine
bic.b #USIIFG,&USICTL1
reti
STATE8 ; Send data byte
bis.b #USIOE,&USICTL0 ; SDA =output
mov.b slav_data,&USISRL ; send data byte
bis.b #0x8,&USICNT ; Bit counter = 8
mov.w #10,I2CState ; Go to next state, generate stop
bic.b #USIIFG,&USICTL1
reti
STATE10 ; Receive Data (N)Ack
bic.b #USIOE,&USICTL0 ; SDA = input
bis.b #0x01,&USICNT ; Receive (N)ack
mov.w #12,I2CState ; Go to next state: check (N)ack
bic.b #USIIFG,&USICTL1
reti
STATE12
bit.b #0x01,&USISRL ; If Nack received
jnc Data_Rx
bis.b #0x01,&P1OUT ; Led ON :error
bic.b #USIOE,&USICTL0 ; SDA = input
jmp STATE12_Exit
Data_Rx
bic.b #0x01,&P1OUT ; LED off
inc.b slav_data ; Increment slave data
bic.b #USIOE,&USICTL0 ; SDA = input
STATE12_Exit
mov.b #0x90,slav_add ; Reset slave address
clr.w I2CState ; Reset state machine
bic.b #USIIFG,&USICTL1
reti
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int04" ; USI Vector
.short USI_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_wdt_01.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - WDT, Toggle P1.0, Interval Overflow ISR, DCO SMCLK
;
; Description: Toggle P1.0 using software timed by the WDT ISR. Toggle rate
; is approximately 30ms based on default DCO/SMCLK clock source
; used in this example for the WDT.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDT_MDLY_32,&WDTCTL ; WDT ~30ms interval timer
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, enable interrupts
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
WDT_ISR; Toggle P1.0
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; Toggle P1.0
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int10" ; WDT Vector
.short WDT_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_wdt_02.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP320F20xx Demo - WDT, Toggle P1.0, Interval Overflow ISR, 32kHz ACLK
;
; Description: Toggle P1.0 using software timed by WDT ISR. Toggle rate is
; exactly 250ms based on 32kHz ACLK WDT clock source. In this example the
; WDT is configured to divide 32768 watch-crystal(2^15) by 2^13 with an ISR
; triggered @ 4Hz.
; ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = DCO
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
Setup mov.w #WDT_ADLY_250,&WDTCTL ; WDT 250ms, ACLK, interval timer
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3, interrupts enabled
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
WDT_ISR; Toggle P1.0
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; Toggle P1.0
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int10" ; WDT Vector
.short WDT_ISR ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_wdt_04.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - WDT+ Failsafe Clock, DCO SMCLK
;
; Description; Allow WDT+ in watchdog to timeout. Toggle P1.0 in main
; funnction. LPM4 is entered, this example will demonstrate WDT+ feature
; of preventing WDT+ clock to be disabled.
; The WD+ will not allow active WDT+ to be disabled by software, the
; The WDT+ will not allow active WDT+ to be disabled by software even though
; the LED continues to Flash because the WDT times out normally even though
; software has attempted to disable WDT+ clock source.
; The MSP430F1xx will stop code execution when software disables WDT+ clock
; source.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
bis.b #001h,&P1DIR ; P1.0 output
xor.b #001h,&P1OUT ; Toggle P1.0
bis.w #LPM4,SR ; Disable all clocks
Mainloop jmp $
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_wdt_05.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Reset on Invalid Address fetch, Toggle P1.0
;
; Description: Toggle P1.0 by xor'ing P1.0 inside of a software loop that
; ends with TAR loaded with 3FFFh - op-code for "jmp $" This simulates a code
; error. The MSP430F2xx will force a reset because it will not allow a fetch
; from within the address range of the peripheral memory, as is seen by
; return to the mainloop and LED flash.
; In contrast, an MSP430F1xx device will "jmp $" stopping code execution with
; no LED flash.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
mov.w #03FFFh,&TAR ; "jmp $"
;
Mainloop xor.b #001h,&P1OUT ; Toggle P1.0
Wait mov.w #050000,R15 ; Delay to R15
L1 dec.w R15 ; Decrement R15
jnz L1 ; Delay over?
mov #0170h,PC ; Invalid fetch
jmp Mainloop ; Again
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20x3_wdt_06.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x Demo - WDT+ Failsafe Clock, 32kHz ACLK
;
; Description; Allow WDT+ in watchdog to timeout sourced by ACLK. LPM3 is
; entered, this example will demonstrate WDT+ feature by automatically
; re-enabling WDT+ clock source as DCO if external XTAL fails. This can be
; seen as a continued, though faster as clocked by DCO, watchdog timeout
; which will toggle on P1.0 in main function.
; ACLK = 32kHz, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; P.Thanigai
; Texas Instruments Inc.
; May 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDT_ARST_1000,&WDTCTL ; Set Watchdog Timer timeout 1s
bis.b #001h,&P1DIR ; P1.0 output
xor.b #001h,&P1OUT ; Toggle P1.0
bis.w #LPM3,SR ;
Mainloop jmp $
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_CCS/msp430x20xx_dco_flashcal.asm
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - DCO Calibration Constants Programmer
;
; NOTE: THIS CODE REPLACES THE TI FACTORY-PROGRAMMED DCO CALIBRATION
; CONSTANTS LOCATED IN INFOA WITH NEW VALUES. USE ONLY IF THE ORIGINAL
; CONSTANTS WERE ACCIDENTALLY CORRUPTED OR ERASED.
;
; Description: This code re-programs the F20xx DCO calibration constants.
; A software FLL mechanism is used to set the DCO based on an external
; 32kHz reference clock. After each calibration, the values from the
; clock system are read out and stored in a temporary variable. The final
; frequency the DCO is set to is 1MHz, and this frequency is also used
; during Flash programming of the constants. The program end is indicated
; by the blinking LED.
; ACLK = LFXT1/8 = 32768/8, MCLK = SMCLK = target DCO
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; ---------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|--> LED
; | P1.4|--> SMLCK = target DCO
;
; P. Thanigai
; Texas Instruments Inc.
; July 2007
; Built with Code Composer Essentials Version: 2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;-------------------------------------------------------------------------------
DELTA_1MHZ .EQU 244 ; 244 x 4096Hz = 999.4Hz
DELTA_8MHZ .EQU 1953 ; 1953 x 4096Hz = 7.99MHz
DELTA_12MHZ .EQU 2930 ; 2930 x 4096Hz = 12.00MHz
DELTA_16MHZ .EQU 3906 ; 3906 x 4096Hz = 15.99MHz
;-------------------------------------------------------------------------------
.data ; RAM variables
;------------------------------------------------------------------------------
.bss Const1,1 ; Temp. storage for constants
.bss Const2,1
.bss Const3,1
.bss Const4,1
.bss Const5,1
.bss Const6,1
.bss Const7,1
.bss Const8,1
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
push.w #0ffffh ; LFXT1 startup delay
OscDelay dec.w 0(SP) ; Do calc on the stack
jnz OscDelay ;
incd.w SP ; Correct SP
SetupP1 clr.b &P1OUT ; Clear P1 output latches
mov.b #010h,&P1SEL ; P1.4 SMCLK output
mov.b #011h,&P1DIR ; P1.0,4 output
;
Main mov.w #DELTA_16MHZ,R12 ; Set DCO and obtain constants
call #Set_DCO ;
mov.b &DCOCTL,&Const1 ;
mov.b &BCSCTL1,&Const2 ;
mov.w #DELTA_12MHZ,R12 ; Set DCO and obtain constants
call #Set_DCO ;
mov.b &DCOCTL,&Const3 ;
mov.b &BCSCTL1,&Const4 ;
mov.w #DELTA_8MHZ,R12 ; Set DCO and obtain constants
call #Set_DCO ;
mov.b &DCOCTL,&Const5 ;
mov.b &BCSCTL1,&Const6 ;
mov.w #DELTA_1MHZ,R12 ; Set DCO and obtain constants
call #Set_DCO ;
mov.b &DCOCTL,&Const7 ;
mov.b &BCSCTL1,&Const8 ;
;
mov.w #FWKEY+FSSEL0+FN1,&FCTL2; MCLK/3 for Flash Timing Generator
mov.w #FWKEY+ERASE,&FCTL1 ; Set Erase bit
mov.w #FWKEY+LOCKA,&FCTL3 ; Clear LOCK & LOCKA bits
mov.w #0,&010c0h ; Dummy write to erase Flash seg A
mov.w #FWKEY+WRT,&FCTL1 ; Set WRT bit for write operation
mov.b &Const1,&010f8h ; re-flash DCO calibration data
mov.b &Const2,&010f9h ; re-flash DCO calibration data
mov.b &Const3,&010fah ; re-flash DCO calibration data
mov.b &Const4,&010fbh ; re-flash DCO calibration data
mov.b &Const5,&010fch ; re-flash DCO calibration data
mov.b &Const6,&010fdh ; re-flash DCO calibration data
mov.b &Const7,&010feh ; re-flash DCO calibration data
mov.b &Const8,&010ffh ; re-flash DCO calibration data
mov.w #FWKEY,&FCTL1 ; Clear WRT bit
mov.w #FWKEY+LOCKA+LOCK,&FCTL3; Set LOCK & LOCKA bit
;
Mainloop xor.b #001h,&P1OUT ; Toggle LED
push.w #20000 ; Delay to TOS
Delay dec.w 0(SP) ; Decrement TOS
jnz Delay ; Delay over?
incd.w SP ; Clean stack
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
Set_DCO; Subroutine: Sets DCO to selected frequency based on Delta (R12).
; R13, R14, and R15 are used, ACLK= 32768/8 Timer_A clocked by DCOCLK
;-------------------------------------------------------------------------------
bis.b #DIVA_3,&BCSCTL1 ; ACLK = LFXT1CLK/8
clr.w R15 ;
Setup_CC2 mov.w #CM_1+CCIS_1+CAP,&TACCTL0 ; CAP, ACLK
Setup_TA mov.w #TASSEL_2+MC_2+TACLR,&TACTL ; SMCLK, Continous Mode, clear
Test_DCO bit.w #CCIFG,&TACCTL0 ; Test capture flag
jz Test_DCO ;
bic.w #CCIFG,&TACCTL0 ; Clear capture flag
;
AdjDCO mov.w &TACCR0,R14 ; R14 = captured SMCLK
sub.w R15,R14 ; R14 = capture difference
mov.w &TACCR0,R15 ; R15 = captured SMCLK
cmp.w R12,R14 ; Delta (R12) = SMCLK/(32768/4)
jlo IncDCO ;
jeq DoneDCO ;
DecDCO dec.b &DCOCTL ; Slow DCO with DCO and MOD
jc Test_DCO ; Slower?
bit.b #00fh,&BCSCTL1 ; Can RSELx be decremented
jnc Test_DCO ; No
dec.b &BCSCTL1 ; Decrement RSEL.x
jmp Test_DCO ;
IncDCO inc.b &DCOCTL ; Speed DCO with DCO and MOD
jnc Test_DCO ; Faster?
mov.b &BCSCTL1,R13 ; Can RSEL.x be increased?
and.b #00fh,R13 ;
cmp.b #00fh,R13 ;
jz Test_DCO ; No
inc.b &BCSCTL1 ; Increment RSEL.x
jmp Test_DCO ;
DoneDCO clr.w &TACCTL0 ; Stop TACCR0
clr.w &TACTL ; Stop Timer_A
bic.b #DIVA_3,&BCSCTL1 ; ACLK = LFXT1CLK
ret ; Return from subroutine
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
MSP430F20xx_Code_Examples/Assembly_IAR/!Readme.txt
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File Name Description
----------------------------------------------------------------------------------------
msp430x20x1_ca_01.s43 Comp_A, Output Reference Voltages on P1.1
msp430x20x1_ca_02.s43 Comp_A, Detect Threshold, Set P1.0 if P1.1 > 0.25*Vcc
msp430x20x1_ca_03.s43 Comp_A, Simple 2.2V Low Battery Detect
msp430x20x2_adc10_01.s43 ADC10, Sample A0, Set P1.0 if A0 > 0.5*AVcc
msp430x20x2_adc10_02.s43 ADC10, Sample A1, 1.5V Ref, Set P1.0 if A1 > 0.2V
msp430x20x2_adc10_03.s43 ADC10, ADC10, Sample A10 Temp, Set P1.0 if Temp ++ ~2C
msp430x20x2_adc10_04.s43 ADC10, ADC10, Sample A1, Signed, Set P1.0 if A1 > 0.5*AVcc
msp430x20x2_adc10_05.s43 ADC10, ADC10, Sample A11, Lo_Batt, Set P1.0 if AVcc < 2.3V
msp430x20x2_adc10_06.s43 ADC10, ADC10, Output Internal Vref on P1.4 & ADCCLK on P1.3
msp430x20x2_adc10_07.s43 ADC10, DTC Sample A1 32x, AVcc, Repeat Single, DCO
msp430x20x2_adc10_08.s43 ADC10, ADC10, DTC Sample A1 32x, 1.5V, Repeat Single, DCO
msp430x20x2_adc10_09.s43 ADC10, ADC10, DTC Sample A10 32x, 1.5V, Repeat Single, DCO
msp430x20x2_adc10_10.s43 ADC10, ADC10, DTC Sample A3-01, AVcc, Single Sequence, DCO
msp430x20x2_adc10_11.s43 ADC10, ADC10, Sample A1, 1.5V, TA1 Trig, Set P1.0 if > 0.5V
msp430x20x2_adc10_12.s43 ADC10, Sample A7, 1.5V, TA1 Trig, Ultra-Low Pwr
msp430x20x2_adc10_13.s43 ADC10, DTC Sample A1 32x, AVcc, TA0 Trig, DCO
msp430x20x2_adc10_14.s43 ADC10, DTC Sample A1-0 16x, AVcc, Repeat Seq, DCO
msp430x20x2_adc10_16.s43 ADC10, ADC10, DTC Sample A0 -> TA1, AVcc, DCO
msp430x20x2_adc10_temp.s43 ADC10, Sample A10 Temp and Convert to oC and oF
msp430x20x3_1.s43 Software Toggle P1.0
msp430x20x3_1_vlo.s43 Software Toggle P1.0, MCLK = VLO/8
msp430x20x3_clks.s43 Basic Clock, Output Buffered SMCLK, ACLK and MCLK/10
msp430x20x3_flashwrite_01.s43 Flash In-System Programming, Copy SegC to SegD
msp430x20x3_LFxtal_nmi.s43 LFXT1 Oscillator Fault Detection
msp430x20x3_lpm3.s43 Basic Clock, LPM3 Using WDT ISR, 32kHz ACLK
msp430x20x3_lpm3_vlo.s43 Basic Clock, LPM3 Using WDT ISR, VLO ACLK
msp430x20x3_nmi.s43 Basic Clock, Configure RST/NMI as NMI
msp430x20x3_P1_01.s43 Software Poll P1.4, Set P1.0 if P1.4 = 1
msp430x20x3_P1_02.s43 Software Port Interrupt on P1.4 from LPM4
msp430x20x3_P1_03.s43 Poll P1 With Software with Internal Pull-up
msp430x20x3_P1_04.s43 P1 Interrupt from LPM4 with Internal Pull-up
msp430x20x3_sd16A_01.s43 SD16A, Sample A1+ Continuously, Set P1.0 if > 0.3V
msp430x20x3_sd16A_02.s43 SD16, Using the Integrated Temperature Sensor
msp430x20x3_sd16A_03.s43 SD16A takes a sample of a single sequence of channels
msp430x20x3_ta_01.s43 Timer_A, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK
msp430x20x3_ta_02.s43 Timer_A, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK
msp430x20x3_ta_03.s43 Timer_A, Toggle P1.0, Overflow ISR, DCO SMCLK
msp430x20x3_ta_04.s43 Timer_A, Toggle P1.0, Overflow ISR, 32kHz ACLK
msp430x20x3_ta_05.s43 Timer_A, Toggle P1.0, CCR0 Up Mode ISR, 32kHz ACLK
msp430x20x3_ta_06.s43 Timer_A, Toggle P1.0, CCR1 Cont. Mode ISR, DCO SMCLK
msp430x20x3_ta_07.s43 Timer_A, Toggle P1.0-3, Cont. Mode ISR, DCO SMCLK
msp430x20x3_ta_08.s43 Timer_A, Toggle P1.0-2, Cont. Mode ISR, 32kHz ACLK
msp430x20x3_ta_10.s43 Timer_A, Toggle P1.1/TA0, Up Mode, DCO SMCLK
msp430x20x3_ta_11.s43 Timer_A, Toggle P1.1/TA0, Up Mode, 32kHz ACLK
msp430x20x3_ta_13.s43 Timer_A, Toggle P1.1/TA0, Up/Down Mode, DCO SMCLK
msp430x20x3_ta_14.s43 Timer_A, Toggle P1.1/TA0, Up/Down Mode, 32kHz ACLK
msp430x20x3_ta_16.s43 Timer_A, PWM TA1, Up Mode, DCO SMCLK
msp430x20x3_ta_17.s43 Timer_A, PWM TA1, Up Mode, 32kHz ACLK
msp430x20x3_ta_19.s43 Timer_A, PWM TA1, Up/Down Mode, DCO SMCLK
msp430x20x3_ta_20.s43 Timer_A, PWM TA1-2, Up/Down Mode, 32kHz ACLK
msp430x20x3_ta_uart2400.s43 Timer_A, Ultra-Low Pwr UART 2400 Echo, 32kHz ACLK
msp430x20x3_usi_01.s43 USICNT Used as a One-Shot Timer Function, DCO SMCLK
msp430x20x3_usi_02.s43 SPI full-Duplex 3-wire Master
msp430x20x3_usi_03.s43 SPI full-Duplex 3-wire Slave
msp430x20x3_usi_04.s43 USI SPI Interface to HC165/164 Shift Registers
msp430x20x3_usi_05.s43 USI SPI Interface to TLC549 8-bit ADC
msp430x20x3_usi_06.s43 USI I2C Master Receiver, single byte
msp430x20x3_usi_07.s43 USI I2C Master Transmitter, single byte
msp430x20x3_usi_08.s43 USI I2C Slave Receiver, single byte
msp430x20x3_usi_09.s43 USI I2C Slave Transmitter, single byte
msp430x20x3_wdt_01.s43 WDT, Toggle P1.0, Interval Overflow ISR, DCO SMCLK
msp430x20x3_wdt_02.s43 WDT, Toggle P1.0, Interval Overflow ISR, 32kHz ACLK
msp430x20x3_wdt_04.s43 WDT+ Failsafe Clock, DCO SMCLK
msp430x20x3_wdt_05.s43 Reset on Invalid Address fetch, Toggle P1.0
msp430x20x3_wdt_06.s43 WDT+ Failsafe Clock, 32kHz ACLK
msp430x20xx_dco_flashcal.s43 DCO Calibration Constants Programmer
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x1_ca_01.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x1 Demo - Comp_A, Output Reference Voltages on P1.1
;
; Description: Output comparator_A reference levels on P1.1. Program will
; cycle through the on-chip comparator_A reference voltages with output on
; P1.1. Normal mode is LPM0 with TA0 triggering interrupt for next mode.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20x1
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | CA1/P1.1|-->Vref
; | |
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; November 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
mov.b #P2CA4,&CACTL2 ; CA1
SetupC0 mov.w #CCIE,&CCTL0 ; CCR0 interrupt enabled
SetupTA mov.w #TASSEL_2+ID_3+MC_2,&TACTL ; SMCLK/8, contmode
eint ; General enable interrupts
;
Mainloop clr.b &CACTL1 ; No reference voltage
bis.w #CPUOFF,SR ; CPU off
Ref1 mov.b #CAREF0+CAON,&CACTL1 ; 0.25*Vcc, Comp. on
bis.w #CPUOFF,SR ; CPU off
Ref2 mov.b #CAREF1+CAON,&CACTL1 ; 0.5*Vcc, Comp. on
bis.w #CPUOFF,SR ; CPU off
Ref3 mov.b #CAREF1+CAREF0+CAON,&CACTL1 ; 0.55V on P2.3, Comp. on
bis.w #CPUOFF,SR ; CPU off
jmp Mainloop ;
;-------------------------------------------------------------------------------
TA0_ISR; Exit LPM0
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on RETI
reti ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFF2h ; Timer_A0 Vector
DW TA0_ISR ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x1_ca_02.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x1 Demo - Comp_A, Detect Threshold, Set P1.0 if P1.1 > 0.25*Vcc
;
; Description: Use comparator_A to detect a voltage threshold. Using an
; external potentiometer, an unknown analog voltage is applied to P1.1.
; Comparator_A compares the unknown voltage to an internal reference
; voltage, in this example 0.25*VCC. If the interesting voltage is higher
; than 0.25*Vcc, P1.0 is set, if not, P1.0 is reset.
; ACLK = n/a, MCLK = SMCLK = default
;
; MSP430F20x1
; -----------------
; /|\ | XIN|-
; | | |
; ---|RST XOUT|-
; | | |
; R<-|P1.1/CA1 P1.0|--> LED
; | | |
; ---|VSS
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; December 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 = output
mov.b #CARSEL+CAREF0+CAON,&CACTL1 ; 0.25Vcc = -comp, on
mov.b #P2CA4,&CACTL2 ; P1.1/CA1 = +comp
;
Mainloop bit.b #CAOUT,&CACTL2 ; Test comparator_A output
jz OFF ; jmp--> if CAOUT reset
;
ON bis.b #001h,&P1OUT ; P1.0 = 1
jmp Mainloop ;
OFF bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x1_ca_03.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x1 Demo - Comp_A, Simple 2.2V Low Battery Detect
;
; Description: Two comparator_A reference generators 0.25*Vcc and ~ 0.55V
; are compared for a simple battery check of 2.2V. In the subroutine
; Batt_Check a small capacitor that must be added to P2.3 is first charged
; to 0.25*Vcc and then compared to ~ 0.55V. If 0.25*Vcc,
; is above ~0.55V, P1.0 is toggled, else set. Batt_Check is
; called constantly in an endless loop - in an actual application,
; Batt_Check should be called very infrequently to save power.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; There is a tolerence of the Comp_A reference generator and in the
; device specific datasheet. In most applications, the tolerence of the
; reference generator is more than adequate to detect Low Battery.
;
; MSP430F20x1
; -----------------
; /|\ | XIN|-
; | | |
; ---|RST XOUT|-
; | |
; +-----|P1.1 P1.0|-->LED
; | | |
; ===.1uf| |
; | | |
; +-----|VSS
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; December 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
bis.b #001h,&P1DIR ; P1.0 output
mov.b #P2CA4,&CACTL2 ; P1.1 = CA1
;
Mainloop call #Batt_Check ;
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
Batt_Check
;-------------------------------------------------------------------------------
mov.b #CAREF0+CAON,&CACTL1 ; 0.25*Vcc on P2.3, Comp. on
Wait clr.w R15 ; Delay to R15
L1 dec.w R15 ;
jnz L1 ; Delay over?
mov.b #CARSEL+CAREF1+CAREF0+CAON,&CACTL1 ; 0.55V on -, Comp. on
bit.b #CAOUT,&CACTL2 ;
clr.b &CACTL1 ; Disable Comp_A, save power
jnc Batt_Low ;
xor.b #001h,&P1OUT ; P1.0 toggle
ret ;
Batt_Low bis.b #001h,&P1OUT ; P1.0 set
ret
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_01.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A1, AVcc Ref, Set P1.0 if A1 > 0.5*AVcc
;
; Description: A single sample is made on A1 with reference to AVcc.
; Software sets ADC10SC to start sample and conversion - ADC10SC
; automatically cleared at EOC. ADC10 internal oscillator times sample (16x)
; and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10
; conversion complete, ADC10_ISR will force exit from any LPMx in Mainloop on
; reti. If A1 > 0.5*AVcc, P1.0 set, else reset.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|--> LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #ADC10SHT_2+ADC10ON+ADC10IE,&ADC10CTL0 ; 16x, enable int.
mov.w #INCH_1, &ADC10CTL1
bis.b #02h,&ADC10AE0 ; P1.1 ADC10 option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling/conversion
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #01h,&P1OUT ; P1.0 = 0
cmp.w #01FFh,&ADC10MEM ; ADC10MEM = A1 > 0.5AVcc?
jlo Mainloop ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_02.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A1, 1.5V Ref, Set P1.0 if A1 > 0.2V
;
; Description: A single sample is made on A1 with reference to internal
; 1.5V Vref. Software sets ADC10SC to start sample and conversion - ADC10SC
; automatically cleared at EOC. ADC10 internal oscillator times sample (16x)
; and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10
; conversion complete, ADC10_ISR will force exit from any LPMx in Mainloop on
; reti. If A1 > 0.2V, P1.0 set, else reset.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|--> LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #SREF_1+ADC10SHT_2+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint
bis.b #02h,&ADC10AE0 ; P1.1 ADC10 option select
mov.w #INCH_1, &ADC10CTL1 ; A1 input
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling/conversion
bis.w #CPUOFF+GIE,SR ; LPM0, ADC12 ISR will force exit
bic.b #01h,&P1OUT ; P1.0 = 0
cmp.w #088h,&ADC10MEM ; ADC10MEM = A1 > 0.2V?
jlo Mainloop ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0, interrupts enabled
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #LPM0,0(SP) ; Exit LPM0, interrupts enabled
reti ;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_03.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A10 Temp, Set P1.0 if Temp ++ ~2C
;
; Description: Set ADC10 and the integrated temperature sensor to detect
; temperature gradients. The temperature sensor output voltage is sampled
; ~ every 120ms and compared with the defined delta values using an ISR.
; (ADC10OSC/4)/64 determines sample time which needs to be greater than
; 30us for temperature sensor.
; ADC10 is operated in repeat-single channel mode with the sample and
; convert trigger sourced from Timer_A CCR1. The ADC10IFG at the end
; of each converstion will trigger an ISR.
; ACLK = n/a, MCLK = SMCLK = default DCO ~1.2MHz, ADC10CLK = ADC10OSC
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A10 (Temp) P1.0|-->LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ADCDeltaOn EQU 3 ; ~ 2 Deg C delta for LED on
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
mov.w #ADC10DIV_3+INCH_10+SHS_1+CONSEQ_2,&ADC10CTL1
mov.w #SREF_1+ADC10SHT_3+REF2_5V+ADC10IE+REFON+ADC10ON,&ADC10CTL0
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
bis.w #ENC,&ADC10CTL0
mov.w #OUTMOD_4,&TACCTL1 ; Toggle on EQU1 (TAR = 0)
mov.w #TASSEL_2+MC_2,&TACTL ; SMCLK, cont-mode
ADC_Wait bit.w #ADC10IFG,&ADC10CTL0 ; First conversion?
jnc ADC_Wait
mov.w &ADC10MEM,R4 ; Read out 1st ADC value
add.w #ADCDeltaOn,R4 ;
clr.b &P1OUT ; Clear P1
bis.b #01h,&P1DIR ; P1.0 as output
;
Mainloop bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
nop ; Required only for debugger
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
cmp.w R4,&ADC10MEM ; ADC10MEM = A10 > R4
jlo ADC_ISR_1 ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
reti ;
ADC_ISR_1 bic.b #01h,&P1OUT ; P1.0 = 0
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_04.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A1, Signed, Set P1.0 if A1 > 0.5*AVcc
;
; Description: A single sample is made on A1 with SIGNED reference to AVcc.
; Software sets ADC10SC to start sample and conversion - ADC10SC
; automatically cleared at EOC. ADC10 internal oscillator times sample (16x)
; and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10
; conversion complete, ADC10_ISR will force exit from any LPMx in Mainloop on
; reti. If A1 > 0.5*AVcc, P1.0 set, else reset.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|--> LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #ADC10DF+INCH_1,&ADC10CTL1 ; Conversion code singed format
mov.w #ADC10SHT_2+ADC10ON+ADC10IE,&ADC10CTL0 ; 16x, enable int.
bis.b #02h,&ADC10AE0 ; P1.1 ADC10 option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Sampling and conversion start
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #01h,&P1OUT ; P1.0 = 0
tst.w &ADC10MEM ; ADC10MEM = A1 > 0.5AVcc?
jl Mainloop ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_05.s43
Executable
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@@ -0,0 +1,109 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A11, Lo_Batt, Set P1.0 if AVcc < 2.3V
;
; Description: A single sample is made on A11 (AVcc/2) with reference to
; internal 1.5V Vref. Software sets ADC10SC to start sample and conversion
; - ADC10SC automatically cleared at EOC. ADC10 internal oscillator times
; sample (16x) and conversion. ADC10BUSY flag is polled for EOC. If A11
; (AVcc/2) < 0311h (0.65V) indicating AVcc is less 2.3V, P1.0 set indicating
; a lo_Batt condition, else reset.
;
; MSP430F20x2
; --------------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A11 (AVcc/2) P1.0 |--> LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_11,&ADC10CTL1 ; AVcc/2
mov.w #SREF_1+ADC10SHT_2+REFON+ADC10ON,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling/conversion
L1 bit.w #ADC10BUSY,&ADC10CTL1 ; ADC10BUSY?
jnz L1 ;
cmp.w #0311h,&ADC10MEM ; ADC10MEM = A11 (AVcc/2) > 0.65V?
jlo lo_Batt ;
bic.b #01h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
lo_Batt bis.b #01h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_06.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Output Internal Vref on P1.4 & ADCCLK on P1.3
;
; Description: Output ADC10 internal Vref on P1.4, toggling between two
; available options, 2.5V and 1.5V. ADC10OSC also output on P1.3.
;
; MSP430F20x2
; ----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.3/ADC10CLK|--> ADC10OSC ~ 3.5MHz - 6.5MHz
; | P1.4/A4|--> Vref
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #CONSEQ_2,&ADC10CTL1 ; Repeat single channel
mov.w #REFOUT+REFON+MSC+ADC10ON,&ADC10CTL0; ADC10 and VRef
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
bis.b #010h,&ADC10AE0 ; P1.4 = ADC10 option select
bis.b #008h,&P1DIR ; P1.3 = output directon
bis.b #008h,&P1SEL ; P1.3 = ADC10OSC option select
;
Mainloop bic.w #ENC,&ADC10CTL0 ; ADC10 disable
xor.w #REF2_5V,&ADC10CTL0 ; Toggle Vref 1.5/2.5V
bis.w #ENC+ADC10SC,&ADC10CTL0 ; ADC10 enable, start conversion
Delay mov.w #00Fh,R15 ; Long Delay
mov.w #0,R14 ;
Delay_1 dec.w R14 ;
sbc.w R15 ;
jnz Delay_1 ;
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_07.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A1 32x, AVcc, Repeat Single, DCO
;
; Description: Use DTC to sample A1 32 times with reference to AVcc. Software
; writes to ADC10SC to trigger sample burst. In Mainloop MSP430 waits in LPM0
; to save power until ADC10 conversion burst complete, ADC10_ISR(DTC) will
; force exit from any LPMx in Mainloop on reti. ADC10 internal oscillator
; times sample period (16x) and conversion (13x). DTC transfers conversion
; code to RAM 200h - 240h. P1.0 set at start of conversion burst, reset on
; completion.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|-->LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #CONSEQ_2+INCH_1,&ADC10CTL1 ; Repeat single channel, A1
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0 ;
bis.b #02h,&ADC10AE0 ; P1.1 ADC option select
mov.b #020h,&ADC10DTC1 ; 32 conversions
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 = 1
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Sampling and conversion start
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_08.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A1 32x, 1.5V, Repeat Single, DCO
;
; Description: Use DTC to sample A1 32 times with reference to internal 1.5v.
; Vref Software writes to ADC10SC to trigger sample burst. In Mainloop MSP430
; waits in LPM0 to save power until ADC10 conversion complete, ADC10_ISR(DTC)
; will force exit from any LPMx in Mainloop on reti. ADC10 internal
; oscillator times sample period (16x) and conversion (13x). DTC transfers
; conversion code to RAM 200h - 240h. P1.0 set at start of conversion burst,
; reset on completion.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|-->LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #CONSEQ_2+INCH_1,&ADC10CTL1 ; Repeat single channel
mov.w #SREF_1+ADC10SHT_2+MSC+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
mov.b #020h,&ADC10DTC1 ; 32 conversions
bis.b #02h,&ADC10AE0 ; P1.1 ADC option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 = 1
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_09.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A10 32x, 1.5V, Repeat Single, DCO
;
; Description: Use DTC to sample A10 32 times with reference to internal 1.5v.
; Vref Software writes to ADC10SC to trigger sample burst. In Mainloop MSP430
; waits in LPM0 to save power until ADC10 conversion complete, ADC10_ISR(DTC)
; will force exit from any LPMx in Mainloop on reti. (ADC10OSC/4)/64
; determines sample time which needs to be greater than 30us for temperature
; sensor. DTC transfers conversion code to RAM 200h - 240h. P1.0 set at start
; of conversion burst, reset oncompletion. Temperature sensor offset and slope
; will vary from device to device per datasheet tolerance.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A10 P1.0|-->LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_10+ADC10DIV_3+CONSEQ_2,&ADC10CTL1 ;
mov.w #SREF_1+ADC10SHT_3+MSC+REFON+ADC10ON+ADC10IE,&ADC10CTL0 ;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
mov.b #020h,&ADC10DTC1 ; 32 conversions
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 =1
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_10.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A3-01, AVcc, Single Sequence, DCO
;
; Description: Sample A3/A2/A1 as single sequence with reference to AVcc.
; Software sets ADC10SC to trigger sample sequence. In Mainloop MSP430 waits
; in LPM0 to save power until ADC10 conversion complete, ADC10_ISR(DTC) will
; force exit from any LPMx in Mainloop on reti. ADC10_ISR will force any LPMx
; exit. ADC10 internal oscillator times sample period (16x) and conversion
; (13x). DTC transfers conversion code to RAM 200h - 206h. P1.0 set at start
; of conversion burst, reset on completion.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.3/A3 P1.0|-->LED
; >---|P1.2/A2 |
; >---|P1.1/A1 |
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_3+CONSEQ_1,&ADC10CTL1 ; A3/A2/A1, single sequence
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0 ;
bis.b #0Eh,&ADC10AE0 ; P1.1,2,3 ADC10 option selects
mov.b #03h,&ADC10DTC1 ; 3 conversions
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 = 0
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 1
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM0 on reti
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_11.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A1, 1.5V, TA1 Trig, Set P1.0 if > 0.5V
;
; Description: A1 is sampled 16/second (ACLK/2048) with reference to 1.5V.
; Timer_A is run in upmode and TA1 is used to automatically trigger
; ADC10 conversion, TA0 defines the period. Internal oscillator times sample
; (16x) and conversion (13x). Inside ADC10_ISR if A1 > 0.5Vcc, P1.0 is set,
; else reset. Normal mode is LPM3.
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0|--> LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #SHS_1+CONSEQ_2+INCH_1,&ADC10CTL1 ; TA1 trigger sample start
mov.w #SREF_1+ADC10SHT_2+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0,enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
bis.w #ENC,&ADC10CTL0 ; ADC10 enable set
bis.b #002h,&ADC10AE0 ; P1.1 ADC10 option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC0 mov.w #2048-1,&TACCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_3,&TACCTL1 ; TACCR1 set/reset
mov.w #2047,&TACCR1 ; TACCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_1+MC_1,&TACTL ; ACLK, up mode
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
bic.b #01h,&P1OUT ; P1.0 = 0
cmp.w #0155h,&ADC10MEM ; ADC10MEM = A1 > 0.5V?
jlo ADC10_Exit ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
ADC10_Exit reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_12.s43
Executable
+128
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@@ -0,0 +1,128 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A7, 1.5V, TA1 Trig, Ultra-Low Pwr
;
; Description: A7 is sampled 1024/second (32xACLK) with reference to 1.5V.
; All activity is interrupt driven with proper usage of MSP430 low-power
; modes, ADC10 and Vref demonstrated. Timer_A with both TA1/TA0 used in
; upmode to drive ADC10 conversion (continuous mode can also be used).
; Inside of TA0_ISR software will enable ADC10 and internal reference and
; allow > 30us delay for Vref to stabilize prior to sample start. Sample
; start is automatically triggered by TA1 every 32 ACLK cycles. ADC10_ISR
; will disable ADC10 and Vref and compare ADC10 conversion code. Internal
; oscillator times sample (16x) and conversion (13x). If A7 > 0.2Vcc,
; P1.0 is set, else reset. Normal Mode is LPM3.
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; +-----(0.9766us)---------\\------------------>+
; TA0_ISR TA1 ADC10_ISR TA0_ISR TA1
; -----+------------+------------+-----------\\------+------------+----->
; Enable ADC Trigger ADC Disable ADC
; and Vref Compare
; +-( >30us--->+
;
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; >---|P1.7/A7 P1.0 |--> LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_7+SHS_1,&ADC10CTL1 ; P1.7, TA1 trigger sample start
bis.b #080h,&ADC10AE0 ; P1.7 ADC10 option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC0 mov.w #CCIE,&TACCTL0 ; Enable interrupt
mov.w #32-1,&TACCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_3,&TACCTL1 ; TACCR1 set/reset
mov.w #2,&TACCR1 ; TACCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_1+MC_1,TACTL ; ACLK, up mode
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
bic.w #ENC,&ADC10CTL0 ; ADC10 disabled
clr.w &ADC10CTL0 ; ADC10, Vref disabled completely
bic.b #01h,&P1OUT ; P1.0 = 0
cmp.w #088h,&ADC10MEM ; ADC10MEM = A7 > 0.2V?
jlo ADC10_Exit ; Again
bis.b #01h,&P1OUT ; P1.0 = 1
ADC10_Exit reti ;
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
mov.w #SREF_1+ADC10SHT_2+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
bis.w #ENC,&ADC10CTL0 ; ADC10 enable set
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_13.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A1 32x, AVcc, TA0 Trig, DCO
;
; Description: A1 is sampled in 32x burst using DTC ever 16/second
; (ACLK/2048) with reference to AVcc. All. Activity is interrupt driven.
; Timer_A in upmode uses TA0 toggle to drive ADC10 conversion. Sample burst
; is automatically triggered by TA0 rising edge every 16 ACLK cycles.
; ADC10_ISR will exit from LPM3 mode and return CPU active. Internal ADC10OSC
; times sample (16x) and conversion (13x). DTC transfers conversion code to
; RAM 200h - 240h. In the Mainloop P1.0 is toggled. Normal Mode is LPM3.
; //* An external watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; >---|P1.1/A1 P1.0 |--> LED
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_1+SHS_2+CONSEQ_2,&ADC10CTL1 ; TA0 trigger
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0;
mov.b #020h,&ADC10DTC1 ; 32 conversions
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
bis.b #002h,&ADC10AE0 ; P1.1 ADC10 option select
mov.w #1024-1,&TACCR0 ; PWM Period
SetupC0 mov.w #OUTMOD_4,&TACCTL0 ; TACCR0 toggle
SetupTA mov.w #TASSEL_1+MC_1,TACTL ; ACLK, up mode
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.w #ENC,&ADC10CTL0 ; Sampling and conversion ready
bis.w #LPM3+GIE,SR ; LPM3, ADC10_ISR will force exit
xor.b #001h,&P1OUT ; P1.0 = toggle
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
ADC10_ISR; Exit LPM3 on reti
;-------------------------------------------------------------------------------
bic.w #LPM3,0(SP) ; Exit LPM3 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_14.s43
Executable
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@@ -0,0 +1,107 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A1-0 16x, AVcc, Repeat Seq, DCO
;
; Description: Use DTC to sample A1/A0 repeat sequence 16x(32 total samples)
; with reference to AVcc. Software writes to ADC10SC to trigger sample burst.
; In Mainloop MSP430 waits in LPM0 to save power until ADC10 conversion
; complete, ADC10_ISR will force exit from any LPMx in Mainloop on reti.
; ADC10 internal oscillator times sample period (16x) and conversion (13x).
; DTC transfers conversion code to RAM 200h - 240h. ADC10(DTC) interrupt
; will return system active.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.1/A1 |
; >---|P1.0/A0 |
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_1+CONSEQ_3,&ADC10CTL1 ; A1/A0, repeat multi channel
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0 ;
bis.b #03h,&ADC10AE0 ; P1.0,1 ADC option select
mov.b #020h,&ADC10DTC1 ; 32 conversions
;
Mainloop
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; CPU off, Enable interrupts
nop ; space for debugger
nop ; set breakpoint here to read ADC
jmp Mainloop ; Again, set breakpoint here to read ADC
;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
bic.w #ENC,&ADC10CTL0 ; ADC10 disabled
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_16.s43
Executable
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@@ -0,0 +1,105 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, DTC Sample A0 -> TA1, AVcc, DCO
;
; Description: Use DTC to sample A0 with reference to AVcc and directly
; transfer code to CCR1. Timer_A has been configured for 10-bit PWM mode.
; CCR1 duty cycle is automatically proportional to ADC10 A0. WDT_ISR used
; as a period wakeup timer approximately 45ms based on default ~1.2MHz
; DCO/SMCLK clock source used in this example for the WDT clock source.
; Timer_A also uses default DCO.
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|P1.0/A0 P1.2|--> TACCR1 - 0-1024 PWM
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
SetupWDT mov.w #WDT_MDLY_32,&WDTCTL ; WDT ~45ms interval timer
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupADC10 mov.w #ADC10SHT_2+ADC10ON,&ADC10CTL0 ;
bis.b #01h,&ADC10AE0 ; P1.0 ADC option select
mov.b #001h,&ADC10DTC1 ; 1 conversion
SetupP1 bis.b #004h,&P1DIR ; P1.2 = output
bis.b #004h,&P1SEL ; P1.2 = TA1 output
SetupC0 mov.w #1024-1,&TACCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_7,&TACCTL1 ; TACCR1 reset/set
mov.w #512,&TACCR1 ; TACCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_2+MC_1,&TACTL ; SMCLK, upmode
;
Mainloop bis.b #CPUOFF+GIE,SR ; LPM0, WDT_ISR will force exit
mov.w #TACCR1,&ADC10SA ; Data transfer location
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
WDT_ISR; Exit LPM0 mode, reti returns system active
;-------------------------------------------------------------------------------
bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG WDT_VECTOR ; Watchdog Timer
DW WDT_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x2_adc10_temp.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x2 Demo - ADC10, Sample A10 Temp and Convert to oC and oF
;
; Description: A single sample is made on A10 with reference to internal
; 1.5V Vref. Software sets ADC10SC to start sample and conversion - ADC10SC
; automatically cleared at EOC. ADC10 internal oscillator/4 times sample
; (64x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until
; ADC10 conversion complete, ADC10_ISR will force exit from any LPMx in
; Mainloop on reti. Result is converted to Temperature represented as
; BCD 0000 - 0145 representing oC saved at 0200h and 0000 - 0292 representing
; oF saved at 0202h. Temperature sensor offset and slope will vary from device
; to device per datasheet tolerance.
; Uncalibrated temperature measured from device to devive will vary with
; slope and offset - please see datasheet.
; ACLK = n/a, MCLK = SMCLK = default DCO ~1.2MHz, ADC10CLK = ADC10OSC/4
;
; MSP430F20x2
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; |A10 |
;
; L. Westlund
; Texas Instruments Inc.
; May 2006
; Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
RSEG CSTACK ; Define stack segment
;-------------------------------------------------------------------------------
RSEG CODE ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #INCH_10+ADC10DIV_3,&ADC10CTL1 ; Temp Sensor ADC10CLK/4
mov.w #SREF_1+ADC10SHT_3+REFON+ADC10ON+ADC10IE,&ADC10CTL0 ;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ;
;
Mainloop bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling/conversion
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
call #Trans2TempC ; Transform voltage to temperature
call #BIN2BCD4 ; R13 = TempC = 0000 - 0145 BCD
mov.w R13,&0200h ; 0200h = temperature oC
call #Trans2TempF ; Transform voltage to temperature
call #BIN2BCD4 ; R13 = TempF = 0000 - 0292 BCD
mov.w R13,&0202h ; 0202h = temperature oF
jmp Mainloop ; << breakpoint here
;
;-------------------------------------------------------------------------------
Trans2TempC;Subroutine coverts R12 = ADC10MEM/1024*423-278
; oC = ((x/1024)*1500mV)-986mV)*1/3.55mV = x*423/1024 - 278
; Input: ADC10MEM 0000 - 0FFFh, R11, R12, R14, R15 working register
; Output: R12 0000 - 091h
;-------------------------------------------------------------------------------
mov.w &ADC10MEM,R12 ;
mov.w #423,R11 ; C
call #MPYU ;
bic.w #00FFh,R14 ; /1024
add.w R15,R14 ;
swpb R14 ;
rra.w R14 ;
rra.w R14 ;
mov.w R14,R12 ;
sub.w #278,R12 ; C
ret ;
;
;-------------------------------------------------------------------------------
Trans2TempF;Subroutine coverts R12 = ADC10MEM/1024*761-468
; oF = ((x/1024)*1500mV)-923mV)*1/1.97mV = x*761/1024 - 468
; Input: ADC10MEM 0000 - 0FFFh, R11, R12, R14, R15 working register
; Output: R12 0000 - 0124h
;-------------------------------------------------------------------------------
mov.w &ADC10MEM,R12 ;
mov.w #761,R11 ; F
call #MPYU ;
bic.w #00FFh,R14 ; /1024
add.w R15,R14 ;
swpb R14 ;
rra.w R14 ;
rra.w R14 ;
mov.w R14,R12 ;
sub.w #468,R12 ; F
ret ;
;
;-------------------------------------------------------------------------------
BIN2BCD4 ; Subroutine converts binary number R12 -> Packed 4- digit BCD R13
; Input: R12 0000 - 0FFFh, R15 working register
; Output: R13 0000 - 4095
;-------------------------------------------------------------------------------
mov.w #16,R15 ; Loop Counter
clr.w R13 ; 0 -> RESULT LSD
BIN1 rla.w R12 ; Binary MSB to carry
dadd.w R13,R13 ; RESULT x2 LSD
dec.w R15 ; Through?
jnz BIN1 ; Not through
ret ;
;
;-------------------------------------------------------------------------------
MPYU ; Unsigned Multipy R11 x R12 = R15|R14
; Input: R11, R12 -- R10 and R13 are working registers
; Output: R15, R14
;-------------------------------------------------------------------------------
clr.w R14 ; 0 -> LSBs result
clr.w R15 ; 0 -> MSBs result
MACU clr.w R13 ; MSBs multiplier
mov.w #1,R10 ; bit test register
MPY2 bit.w R10,R11 ; test actual bit
jz MPY1 ; IF 0: do nothing
add.w R12,R14 ; IF 1: add multiplier to result
addc.w R13,R15 ;
MPY1 rla.w R12 ; multiplier x 2
rlc.w R13 ;
rla.w R10 ; next bit to test
jnc MPY2 ; if bit in carry: finished
ret ; Return from subroutine
;
;-------------------------------------------------------------------------------
TA0_ISR; ISR for TACCR0
;-------------------------------------------------------------------------------
clr.w &TACTL ; Clear Timer_A control registers
bic.w #LPM0,0(SP) ; Exit LPMx, interrupts enabled
reti ;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
bic.w #LPM0,0(SP) ; Exit LPM0 on reti
reti ;
;
;-------------------------------------------------------------------------------
COMMON INTVEC ; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG ADC10_VECTOR ; ADC10 Vector
DW ADC10_ISR
ORG TIMERA0_VECTOR ; Timer_A0 Vector
DW TA0_ISR
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_1.s43
Executable
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@@ -0,0 +1,83 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Software Toggle P1.0
;
; Description: Toggle P1.0 by xor'ing P1.0 inside of a software loop.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; October 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop xor.b #001h,&P1OUT ; Toggle P1.0
Wait mov.w #050000,R15 ; Delay to R15
L1 dec.w R15 ; Decrement R15
jnz L1 ; Delay over?
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_1_vlo.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Software Toggle P1.0, MCLK = VLO/8
;
; Description; Pulse P1.0 with a 1/100 active duty cycle using software.
; Ultra-low frequency ~ 1.5kHz, ultra-low power active mode demonstrated.
; ACLK = VL0, MCLK = VLO/8 ~1.5kHz, SMCLK = n/a
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; October 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupBC bis.b #LFXT1S_2,&BCSCTL3 ; LFXT1 = VLO
SetupOsc bic.b #OFIFG,&IFG1 ; Clear OSC fault flag
bis.w #SCG1+SCG0,SR ; Stop DCO
bis.b #SELM_3+DIVM_3,&BCSCTL2 ; MCLK = LFXT1/8
SetupP1 mov.b #0FFh,&P1DIR ; All P1.x outputs
clr.b &P1OUT ; All P1.x reset
SetupP2 mov.b #0FFh,&P2DIR ; All P2.x outputs
clr.b &P2OUT ; All P2.x reset
;
Mainloop bis.b #001h,&P1OUT ; Set P1.0
Delay1 mov.w #020,R15 ; Delay to R15
L1 dec.w R15 ;
jnz L1 ;
bic.b #001h,&P1OUT ; Reset P1.0
Delay2 mov.w #02000,R15 ; Delay to R15
L2 dec.w R15 ;
jnz L2 ;
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_LFxtal_nmi.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - LFXT1 Oscillator Fault Detection
;
; Description: System runs normally in LPM3 with WDT timer clocked by
; 32kHz ACLK with a 1x4 second interrupt. P1.0 is normally pulsed every
; second inside WDT interrupt. If an LFXT1 oscillator fault occurs,
; NMI is requested forcing exit from LPM3. P1.0 is toggled rapidly by software
; as long as LFXT1 oscillator fault is present. Assumed only LFXT1 as NMI
; source - code does not check for other NMI sources.
; ACLK = LFXT1 = 32768, MCLK = SMCLK = Default DCO
;
; //*External watch crystal on XIN XOUT is required for ACLK*//
;
;
; MSP430F20xx
; ---------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED;
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; October 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDT_ADLY_1000,&WDTCTL ; WDT 1s interval timer
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 mov.b #0FFh,&P1DIR ; All P1.x outputs
clr.b &P1OUT ; All P1.x reset
SetupP2 mov.b #0FFh,&P2DIR ; All P2.x outputs
clr.b &P2OUT ; All P2.x reset
; An immedate Osc Fault will occur next
bis.b #OFIE,&IE1 ; Enable osc fault interrupt
;
Mainloop xor.b #001h,&P1OUT ; Toggle P1.0
bis.w #LPM3+GIE,SR ; Enter LPM3, enable interrupts
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
NMI_ISR; Only osc fault enabled, R15 used temporarily and not saved
; Assumed LFXT1 is only source for NMI interrupt
;-------------------------------------------------------------------------------
CheckOsc bic.b #OFIFG,&IFG1 ; Clear OSC fault flag
xor.b #001h,&P1OUT ; Toggle P1.0
mov.w #03FFFh,R15 ; R15 = Delay
CheckOsc1 dec.w R15 ; Time for flag to set
jnz CheckOsc1 ;
bit.b #OFIFG,&IFG1 ; OSC fault flag set?
jnz CheckOsc ; OSC Fault, clear flag again
bis.b #OFIE,&IE1 ; re-enable osc fault interrupt
reti ; return from interrupt
;
;-------------------------------------------------------------------------------
WDT_ISR; Exit LPM3 on reti
;-------------------------------------------------------------------------------
bic.w #LPM3,0(SP) ;
reti ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFF4h ; WDT Vector
DW WDT_ISR ;
ORG 0FFFCh ; NMI vector
DW NMI_ISR ;
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_P1_01.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Software Poll P1.4, Set P1.0 if P1.4 = 1
;
; Description: Poll P1.4 in a loop, if hi P1.0 is set, if low, P1.0 reset.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | |
; --o--|P1.4 P1.0|-->LED
; \|/
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; October 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bit.b #010h,&P1IN ; P1.4 hi/low?
jc ON ; jmp--> P1.4 is set
;
OFF bic.b #001h,&P1OUT ; P1.0 = 0 / LED OFF
jmp Mainloop ;
ON bis.b #001h,&P1OUT ; P1.0 = 1 / LED ON
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_P1_02.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Software Port Interrupt on P1.4 from LPM4
;
; Description: A hi/low transition on P1.4 will trigger P1_ISR which,
; toggles P1.0. Normal mode is LPM4 ~ 0.1uA. LPM4 current can be measured
; with the LED removed, all unused P1.x/P2.x configured as output or inputs
; pulled high or low, and ensure the P2.0 interrupt input does not float.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | |
; --o--|P1.4 P1.0|-->LED
; \|/
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; October 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupPx bis.b #001h,&P1DIR ; P1.0 output
bis.b #010h,&P1IE ; P1.4 Interrupt enabled
bis.b #010h,&P1IES ; P1.4 hi/low edge
bic.b #010h,&P1IFG ; P1.4 IFG Cleared
;
Mainloop bis.w #LPM4+GIE,SR ; LPM4, enable interrupts
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
P1_ISR; Toggle P1.0 Output
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; P1.0 = toggle
bic.b #010h,&P1IFG ; P1.4 IFG Cleared
reti ; Return from ISR
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFE4h ; P1.x Vector
DW P1_ISR ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_P1_03.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Poll P1 With Software with Internal Pull-up
;
; Description: Poll P1.4 in a loop, if hi P1.0 is set, if low, P1.0 reset.
; Internal pullup enabled on P1.4.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | R |
; --o--| P1.4-o P1.0|-->LED
; \|/
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; September 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 mov.b #001h,&P1DIR ; P1.0 output, else input
mov.b #010h,&P1OUT ; P1.4 set, else reset
bis.b #010h,&P1REN ; P1.4 pullup
Mainloop bit.b #010h,&P1IN ; P1.4 hi/low?
jc ON ; jmp--> P1.4 is set
;
OFF bic.b #001h,&P1OUT ; P1.0 = 0 / LED OFF
jmp Mainloop ;
ON bis.b #001h,&P1OUT ; P1.0 = 1 / LED ON
jmp Mainloop ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_P1_04.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - P1 Interrupt from LPM4 with Internal Pull-up
;
; Description: A hi/low transition on P1.4 will trigger P1_ISR which,
; toggles P1.0. Normal mode is LPM4 ~ 0.1uA.
; Internal pullup enabled on P1.4.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | R |
; --o--| P1.4-o P1.0|-->LED
; \|/
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; September 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 mov.b #001h,&P1DIR ; P1.0 output, else input
mov.b #010h,&P1OUT ; P1.4 set, else reset
bis.b #010h,&P1REN ; P1.4 pullup
bis.b #010h,&P1IE ; P1.4 Interrupt enabled
bis.b #010h,&P1IES ; P1.4 hi/low edge
bic.b #010h,&P1IFG ; P1.4 IFG Cleared
;
Mainloop bis.w #LPM4+GIE,SR ; LPM4, enable interrupts
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
P1_ISR; Toggle P1.0 Output
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; P1.0 = toggle
bic.b #010h,&P1IFG ; P1.4 IFG Cleared
reti ; Return from ISR
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFE4h ; P1.x Vector
DW P1_ISR ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_clks.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Basic Clock, Output Buffered SMCLK, ACLK and MCLK/10
;
; Description: Buffer ACLK on P1.0, default SMCLK(DCO) on P1.4 and MCLK/10 on
; P1.1.
; ACLK = LFXT1 = 32768, MCLK = SMCLK = default DCO
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.4/SMCLK|-->SMCLK = Default DCO
; | P1.1|-->MCLK/10 = DCO/10
; | P1.0/ACLK|-->ACLK = 32kHz
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; October 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupPx bis.b #013h,&P1DIR ; P1.0,1,4 output direction
bis.b #011h,&P1SEL ; P1.0,4 = ACLK,SMCLK
;
Mainloop bis.b #002h,&P1OUT ; P1.1 = 1
bic.b #002h,&P1OUT ; P1.1 = 0
jmp Mainloop ; Repeat
;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_flashwrite_01.s43
Executable
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Flash In-System Programming, Copy SegC to SegD
;
; Description: This program first erases flash seg C, then it increments all
; values in seg C, then it erases seg C, then copies seg C to seg D.
; Assumed MCLK 771kHz - 1428kHz.
; //* Set Breakpoint in the Mainloop to avoid Stressing Flash *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
;
#define value R4
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; December 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
CheckCal cmp.b #0xFF,&CALBC1_1MHZ ; Check calibration constants
jne Load ; if not erased, load.
Trap jmp Trap ; if erased do not load, trap CPU!
Load clr.b &DCOCTL ; Select lowest DCOx and MODx settings
mov.b &CALBC1_1MHZ,&BCSCTL1 ; Set DCO to 1MHz
mov.b &CALDCO_1MHZ,&DCOCTL
clr.b value ; value = value to write to flash
;
Mainloop call #Write_SegC ; Copy value to segment C
inc.b value ;
call #CopyC2D ;
jmp Mainloop ; Repeat,SET BREAKPOINT HERE
;
;-------------------------------------------------------------------------------
Write_SegC ;Input = value, holds value to write to Seg C, R5 used as working reg.
;-------------------------------------------------------------------------------
mov.w #01040h,R5 ;
Timing mov.w #FWKEY+FSSEL0+FN1,&FCTL2 ; *Timing generator = MCLK/3
Erase_SegC mov.w #FWKEY,&FCTL3 ; Lock = 0
mov.w #FWKEY+ERASE,&FCTL1 ; Erase bit = 1, allow interrupts
mov.w #0,&01040h ; Dummy write to SegC to erase
Prog_SegC mov.w #FWKEY+WRT,&FCTL1 ; Write bit = 1, block interrupts
mov.w #FWKEY,&FCTL3 ; Lock = 0
Prog_L1 mov.b value,0(R5) ;
inc.w R5 ;
cmp.w #01080h,R5 ;
jne Prog_L1 ;
mov.w #FWKEY+LOCK,&FCTL3 ; Lock = 1;
ret ;
;
;-------------------------------------------------------------------------------
CopyC2D ;Copy Seg C to Seg D, R5 used as working reg.
;-------------------------------------------------------------------------------
mov.w #FWKEY+FSSEL0+FN1,&FCTL2 ; *Timing generator = MCLK/3
Erase_SegD mov.w #FWKEY,&FCTL3 ; Lock = 0
mov.w #FWKEY+ERASE,&FCTL1 ; Erase bit = 1
mov.w #0,&01000h ; Dummy write to SegD to erase
mov.w #01040h,R5 ; R5 = First byte in Seg C
Prog_SegD mov.w #FWKEY+WRT,&FCTL1 ; Write bit = 1, block interrupts
mov.w #FWKEY,&FCTL3 ; Lock = 0
Prog_L2 mov.b @R5+,-65(R5) ; Copy Seg C to Seg D
cmp.w #01080h,R5 ;
jne Prog_L2 ;
mov.w #FWKEY+LOCK,&FCTL3 ; Lock = 1
ret
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_lpm3.s43
Executable
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@@ -0,0 +1,103 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Basic Clock, LPM3 Using WDT ISR, 32kHz ACLK
;
; Description: This program operates MSP430 normally in LPM3, pulsing P1.0
; at 4 second intervals. WDT ISR used to wake-up system. All I/O configured
; as low outputs to eliminate floating inputs. Current consumption does
; increase when LED is powered on P1.0. Demo for measuring LPM3 current.
; ACLK = LFXT1/4 = 32768/4, MCLK = SMCLK = default DCO
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; September 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDT_ADLY_1000,&WDTCTL ; WDT 1s*4 interval timer
SetupBC bis.b #DIVA_2,&BCSCTL1 ; ACLK/4
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 mov.b #0FFh,&P1DIR ; All P1.x outputs
clr.b &P1OUT ; All P1.x reset
SetupP2 mov.b #0FFh,&P2DIR ; All P2.x outputs
clr.b &P2OUT ; All P2.x reset
;
Mainloop bis.b #001h,&P1OUT ; Set P1.0
push.w #5000 ; Delay to TOS
Delay dec.w 0(SP) ; Decrement TOS
jnz Delay ; Delay over?
incd.w SP ; Clean stack
bic.b #001h,&P1OUT ; Reset P1.0
bis.w #LPM3+GIE,SR ; Enter LPM3, enable interrupts
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
WDT_ISR ; Exit LPM3 on reti
;-------------------------------------------------------------------------------
bic.w #LPM3,0(SP) ; Clear LPM3 from TOS
reti ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFF4h ; WDT Vector
DW WDT_ISR ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_lpm3_vlo.s43
Executable
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@@ -0,0 +1,103 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Basic Clock, LPM3 Using WDT ISR, VLO ACLK
;
; Description: This program operates MSP430 normally in LPM3, pulsing P1.0
; ~ 6 second intervals. WDT ISR used to wake-up system. All I/O configured
; as low outputs to eliminate floating inputs. Current consumption does
; increase when LED is powered on P1.0. Demo for measuring LPM3 current.
; ACLK = VLO/2, MCLK = SMCLK = default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; September 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDT_ADLY_1000,&WDTCTL ; WDT 1s*4 interval timer
bis.b #DIVA_1,&BCSCTL1 ; ACLK/2
bis.b #LFXT1S_2,&BCSCTL3 ; ACLK = VLO
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 mov.b #0FFh,&P1DIR ; All P1.x outputs
clr.b &P1OUT ; All P1.x reset
SetupP2 mov.b #0FFh,&P2DIR ; All P2.x outputs
clr.b &P2OUT ; All P2.x reset
;
Mainloop bis.b #001h,&P1OUT ; Set P1.0
push.w #5000 ; Delay to TOS
Delay dec.w 0(SP) ; Decrement TOS
jnz Delay ; Delay over?
incd.w SP ; Clean stack
bic.b #001h,&P1OUT ; Reset P1.0
bis.w #LPM3+GIE,SR ; Enter LPM3, enable interrupts
jmp Mainloop ; Again
;
;-------------------------------------------------------------------------------
WDT_ISR ; Exit LPM3 on reti
;-------------------------------------------------------------------------------
bic.w #LPM3,0(SP) ; Clear LPM3 from TOS
reti ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFF4h ; WDT Vector
DW WDT_ISR ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_nmi.s43
Executable
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@@ -0,0 +1,99 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20xx Demo - Basic Clock, Configure RST/NMI as NMI
;
; Description: Configure RST/NMI as NMI, hi/lo edge. Flash P1.0 inside of
; NMI_ISR if NMI occurs. General enable interrupt in status register does
; not need to be set for NMI. NMIIE does need to be reset, as NMI_ISR
; automatically clears NMI enable to prevent unintentional stack overflow
; that could result from, bounce or uncontrolled NMI's.
; ACLK = n/a, MCLK = SMCLK = Default DCO
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; October 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
SetupWDT mov.w #WDTPW+WDTHOLD+WDTNMI+WDTNMIES,&WDTCTL ; WDT off NMI hi/lo
bis.b #01h,&P1DIR ; P1.0 = output
bic.b #01h,&P1OUT ; P1.0 = reset
bis.b #NMIIE,&IE1 ; Enable NMI
;
Mainloop jmp Mainloop ; Endless Loop
;
;-------------------------------------------------------------------------------
NMI_ISR ; Flash P1.0
;-------------------------------------------------------------------------------
bis.b #01h,&P1OUT ; P1.0 = set
Wait push.w #020000 ; Delay value --> TOS
Wait1 dec.w 0(SP) ; Decrement TOS
jnz Wait1 ; Delay over?
incd.w SP ; Clean up stack
bic.b #01h,&P1OUT ; P1.0 = reset
bic.b #NMIIFG,&IFG1 ; reclear NMI flag in case bounce
bis.b #NMIIE,&IE1 ; Re-enable NMI interrupt
reti ; Done
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFCh ; NMI vector
DW NMI_ISR ;
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_sd16A_01.s43
Executable
+100
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@@ -0,0 +1,100 @@
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430F20x3 Demo - SD16A, Sample A1+ Continuously, Set P1.0 if > 0.3V
;
; Description: A continuous single-ended sample is made on A1+ using internal
; VREf. Unipolar output format used.
; Inside of SD16 ISR, if A1 > 1/2VRef (0.3V), P1.0 set, else reset.
; ACLK = n/a, MCLK = SMCLK = SD16CLK = default DCO
;
; MSP430F20x3
; ------------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; Vin+ -->|A1+ P1.2 |
; |A1- = VSS P1.0|-->LED
; | |
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; October 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupSD16 mov.w #SD16REFON+SD16SSEL_1,&SD16CTL ; 1.2V ref, SMCLK
mov.b #SD16INCH_1,&SD16INCTL0 ; A1+/-
mov.w #SD16UNI+SD16IE,&SD16CCTL0 ; 256OSR, unipolar, inter
mov.b #SD16AE2,&SD16AE ; P1.1 A1+, A1- = VSS
bis.w #SD16SC,&SD16CCTL0 ; Start conversion
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, enable interrupts
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
SD16_ISR;
;-------------------------------------------------------------------------------
bic.b #01h,&P1OUT ;
cmp.w #07FFFh,&SD16MEM0 ; SD16MEM0 > 0.3V?, clears IFG
jlo Done ;
bis.b #01h,&P1OUT ;
Done reti ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFEAh ; SD16 Vector
DW SD16_ISR ;
END

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