Spliting i2s transceiver in to two modules

i2s sender and i2s receiver. Also add JXADC_controler for logic analizer.
2019-10-20 18:38:10 +03:00
parent 31f01e93b3
commit 8da9e7da7c
7 changed files with 327 additions and 62 deletions
@@ -3,12 +3,21 @@ module effect_controler #( parameter
 )(
 //    input clk,
    input signed [d_width-1: 0] i_l_data,
-    input signed [d_width-1: 0] i_r_data,
-    output signed [d_width-1: 0] o_l_data,
-    output signed [d_width-1: 0] o_r_data
+    input signed  [d_width-1: 0] i_r_data,
+    output reg signed [d_width-1: 0] o_l_data,
+    output  reg signed [d_width-1: 0] o_r_data
 );

-assign o_l_data = i_l_data;
-assign o_r_data = i_r_data;
+always@* begin
+    o_l_data <= i_l_data;
+    o_r_data <= i_r_data;
+end
+
+//assign o_l_data = i_l_data;
+//assign o_r_data = i_r_data;
+
+
+//assign o_l_data = 24'h000000;
+//assign o_r_data = 24'h400008;

 endmodule