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Spliting i2s transceiver in to two modules

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i2s sender and i2s receiver.
Also add JXADC_controler for logic analizer.
This commit is contained in:
Imants Pulkstenis
2019-10-20 18:38:10 +03:00
parent 31f01e93b3
commit 8da9e7da7c
7 changed files with 327 additions and 62 deletions
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Basys3_Master.xdc
+25 -25
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@@ -209,31 +209,31 @@ set_property PACKAGE_PIN G3 [get_ports {ad_sdout}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JC[7]}]
##Pmod Header JXADC
##Sch name = XA1_P
#set_property PACKAGE_PIN J3 [get_ports {JXADC[0]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[0]}]
##Sch name = XA2_P
#set_property PACKAGE_PIN L3 [get_ports {JXADC[1]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[1]}]
##Sch name = XA3_P
#set_property PACKAGE_PIN M2 [get_ports {JXADC[2]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[2]}]
##Sch name = XA4_P
#set_property PACKAGE_PIN N2 [get_ports {JXADC[3]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[3]}]
##Sch name = XA1_N
#set_property PACKAGE_PIN K3 [get_ports {JXADC[4]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[4]}]
##Sch name = XA2_N
#set_property PACKAGE_PIN M3 [get_ports {JXADC[5]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[5]}]
##Sch name = XA3_N
#set_property PACKAGE_PIN M1 [get_ports {JXADC[6]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[6]}]
##Sch name = XA4_N
#set_property PACKAGE_PIN N1 [get_ports {JXADC[7]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[7]}]
#Pmod Header JXADC
#Sch name = XA1_P
set_property PACKAGE_PIN J3 [get_ports {JXADC[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[0]}]
#Sch name = XA2_P
set_property PACKAGE_PIN L3 [get_ports {JXADC[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[1]}]
#Sch name = XA3_P
set_property PACKAGE_PIN M2 [get_ports {JXADC[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[2]}]
#Sch name = XA4_P
set_property PACKAGE_PIN N2 [get_ports {JXADC[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[3]}]
#Sch name = XA1_N
set_property PACKAGE_PIN K3 [get_ports {JXADC[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[4]}]
#Sch name = XA2_N
set_property PACKAGE_PIN M3 [get_ports {JXADC[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[5]}]
#Sch name = XA3_N
set_property PACKAGE_PIN M1 [get_ports {JXADC[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[6]}]
#Sch name = XA4_N
set_property PACKAGE_PIN N1 [get_ports {JXADC[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[7]}]