This commit is contained in:
Imants Pulkstenis
2019-10-12 11:36:30 +03:00
parent e9d12a7eb4
commit 2370426916
8 changed files with 374 additions and 29 deletions
+3 -3
View File
@@ -4,9 +4,9 @@
## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project
## Clock signal
#set_property PACKAGE_PIN W5 [get_ports clk]
#set_property IOSTANDARD LVCMOS33 [get_ports clk]
#create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk]
set_property PACKAGE_PIN W5 [get_ports clk]
set_property IOSTANDARD LVCMOS33 [get_ports clk]
create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk]
## Switches
#set_property PACKAGE_PIN V17 [get_ports {sw[0]}]