Task1 done. Code debuging
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-11
@@ -37,22 +37,24 @@
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone V"
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set_global_assignment -name DEVICE 5CGXFC5C6F27C7
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set_global_assignment -name FAMILY "Cyclone 10 GX"
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set_global_assignment -name DEVICE 10CX220YF780I5G
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set_global_assignment -name TOP_LEVEL_ENTITY ps02
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.0.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:44:46 FEBRUARY 25, 2017"
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set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Lite Edition"
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set_global_assignment -name LAST_QUARTUS_VERSION "19.4.0 Pro Edition"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
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set_global_assignment -name VHDL_FILE alu.vhd
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set_global_assignment -name VHDL_FILE ps02.vhd
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set_global_assignment -name VHDL_FILE ps02_siggen.vhd
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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# Obsolete assignment in <Version 19.4> "set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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"
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# Obsolete assignment in <Version 19.4> "set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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"
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# Obsolete assignment in <Version 19.4> "set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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"
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# Obsolete assignment in <Version 19.4> "set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top"
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set_global_assignment -name VERILOG_FILE ps02.v
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set_global_assignment -name VHDL_FILE alu.vhd
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