add aditional modules for start/stop
and for up down counter
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@@ -13,7 +13,8 @@
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//
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// Revision:
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// A - initial design
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// B -
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// B - Correct timmers and 7-segment display.
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// Added UP/DOWN and START/STOP function
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//
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//
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/////////////////////////////
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@@ -26,12 +27,18 @@ module top (
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output [3:0] an,
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output dp,
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input [3:0] sw,
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input btnC // reset
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input btnC, // reset
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input btnU, // UP counting
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input btnD, // DOWN counting
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input btnL // start/stop
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);
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//------internal wires and registers--------
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wire clk16Hz, clk1kHz, w_reset;
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wire clk16Hz, clk1kHz,
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w_reset, w_up,
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w_down, w_direction,
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w_start, w_enable;
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wire [15:0] w_counter;
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@@ -43,6 +50,8 @@ assign led = w_counter;
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counter counter(
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.clk(clk16Hz),
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.reset(w_reset),
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.direction(w_direction),
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.enable(1'b1),
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.max(sw),
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.counter(w_counter)
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);
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@@ -63,13 +72,53 @@ clock_divider #(
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.clk_out(clk16Hz)
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);
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debounce_switch debounce_switch_reset(
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.clk(clk),
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.i_switch(btnC),
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.o_switch(w_reset)
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);
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debounce_switch debounce_up(
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.clk(clk),
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.i_switch(btnU),
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.o_switch(w_up)
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);
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debounce_switch debounce_down(
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.clk(clk),
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.i_switch(btnD),
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.o_switch(w_down)
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);
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debounce_switch debounce_start(
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.clk(clk),
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.i_switch(btnL),
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.o_switch(w_start)
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);
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// flip_flop flip_flop(
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// .clk(clk),
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// .rst(1'b1),
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// .t(w_start),
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// .q(w_enable)
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// );
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sr_latch sr_latch(
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.C(clk),
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.S(~w_up),
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.R(~w_down),
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.Q(w_direction),
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.notQ()
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);
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// sr_latch start_latch(
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// .C(clk),
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// .S(~w_start),
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// .R(~w_start&w_enable),
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// .Q(w_enable),
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// .notQ()
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// );
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bin_7segment bin_7segment(
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.clk(clk1kHz), // clock working with 10kHz
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.in(w_counter), // input
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