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MSP430/MSP430F20xx_Code_Examples/Assembly_IAR/msp430x20x3_wdt_02.s43
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; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP320F20xx Demo - WDT, Toggle P1.0, Interval Overflow ISR, 32kHz ACLK
;
; Description: Toggle P1.0 using software timed by WDT ISR. Toggle rate is
; exactly 250ms based on 32kHz ACLK WDT clock source. In this example the
; WDT is configured to divide 32768 watch-crystal(2^15) by 2^13 with an ISR
; triggered @ 4Hz.
; ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = DCO
; //* External watch crystal installed on XIN XOUT is required for ACLK *//
;
; MSP430F20xx
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; M. Buccini / L. Westlund
; Texas Instruments Inc.
; September 2005
; Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
ORG 0F800h ; Program Reset
;-------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
Setup mov.w #WDT_ADLY_250,&WDTCTL ; WDT 250ms, ACLK, interval timer
bis.b #WDTIE,&IE1 ; Enable WDT interrupt
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3, interrupts enabled
nop ; Required only for debugger
;
;-------------------------------------------------------------------------------
WDT_ISR; Toggle P1.0
;-------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; Toggle P1.0
reti ;
;
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFF4h ; WDT Vector
DW WDT_ISR ;
END