108 lines
5.6 KiB
NASM
Executable File
108 lines
5.6 KiB
NASM
Executable File
; --COPYRIGHT--,BSD_EX
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; Copyright (c) 2012, Texas Instruments Incorporated
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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;
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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;
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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;
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; * Neither the name of Texas Instruments Incorporated nor the names of
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; its contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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; ******************************************************************************
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;
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; MSP430 CODE EXAMPLE DISCLAIMER
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;
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; MSP430 code examples are self-contained low-level programs that typically
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; demonstrate a single peripheral function or device feature in a highly
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; concise manner. For this the code may rely on the device's power-on default
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; register values and settings such as the clock configuration and care must
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; be taken when combining code from several examples to avoid potential side
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; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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; for an API functional library-approach to peripheral configuration.
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;
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; --/COPYRIGHT--
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;*******************************************************************************
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; MSP430F20x2 Demo - ADC10, DTC Sample A0 -> TA1, AVcc, DCO
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;
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; Description: Use DTC to sample A0 with reference to AVcc and directly
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; transfer code to CCR1. Timer_A has been configured for 10-bit PWM mode.
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; CCR1 duty cycle is automatically proportional to ADC10 A0. WDT_ISR used
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; as a period wakeup timer approximately 45ms based on default ~1.2MHz
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; DCO/SMCLK clock source used in this example for the WDT clock source.
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; Timer_A also uses default DCO.
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;
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; MSP430F20x2
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; -----------------
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; /|\| XIN|-
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; | | |
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; --|RST XOUT|-
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; | |
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; >---|P1.0/A0 P1.2|--> TACCR1 - 0-1024 PWM
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;
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; P.Thanigai
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; Texas Instruments Inc.
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; May 2007
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; Built with Code Composer Essentials Version: 2.0
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;*******************************************************************************
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.cdecls C,LIST, "msp430.h"
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;-------------------------------------------------------------------------------
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.def RESET ; Export program entry-point to
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; make it known to linker.
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;------------------------------------------------------------------------------
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.text ; Progam Start
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;------------------------------------------------------------------------------
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RESET mov.w #0280h,SP ; Initialize stackpointer
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SetupWDT mov.w #WDT_MDLY_32,&WDTCTL ; WDT ~45ms interval timer
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bis.b #WDTIE,&IE1 ; Enable WDT interrupt
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SetupADC10 mov.w #ADC10SHT_2+ADC10ON,&ADC10CTL0 ;
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bis.b #01h,&ADC10AE0 ; P1.0 ADC option select
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mov.b #001h,&ADC10DTC1 ; 1 conversion
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SetupP1 bis.b #004h,&P1DIR ; P1.2 = output
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bis.b #004h,&P1SEL ; P1.2 = TA1 output
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SetupC0 mov.w #1024-1,&TACCR0 ; PWM Period
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SetupC1 mov.w #OUTMOD_7,&TACCTL1 ; TACCR1 reset/set
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mov.w #512,&TACCR1 ; TACCR1 PWM Duty Cycle
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SetupTA mov.w #TASSEL_2+MC_1,&TACTL ; SMCLK, upmode
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;
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Mainloop bis.b #CPUOFF+GIE,SR ; LPM0, WDT_ISR will force exit
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mov.w #TACCR1,&ADC10SA ; Data transfer location
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bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
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jmp Mainloop ; Again
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;
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;-------------------------------------------------------------------------------
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WDT_ISR; Exit LPM0 mode, reti returns system active
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;-------------------------------------------------------------------------------
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bic.w #CPUOFF,0(SP) ; Exit LPM0 on reti
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reti ;
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;
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;------------------------------------------------------------------------------
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; Interrupt Vectors
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;------------------------------------------------------------------------------
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.sect ".reset" ; MSP430 RESET Vector
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.short RESET ;
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.sect ".int10" ; WDT Vector
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.short WDT_ISR ;
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.end
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