105 lines
4.5 KiB
C
Executable File
105 lines
4.5 KiB
C
Executable File
/* --COPYRIGHT--,BSD_EX
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* Copyright (c) 2012, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************
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*
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* MSP430 CODE EXAMPLE DISCLAIMER
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*
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* MSP430 code examples are self-contained low-level programs that typically
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* demonstrate a single peripheral function or device feature in a highly
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* concise manner. For this the code may rely on the device's power-on default
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* register values and settings such as the clock configuration and care must
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* be taken when combining code from several examples to avoid potential side
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* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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* for an API functional library-approach to peripheral configuration.
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*
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* --/COPYRIGHT--*/
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//******************************************************************************
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// MSP430F20x1 Demo - Comp_A, Output Reference Voltages on P1.1
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//
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// Description: Output Comparator_A reference levels on P1.1. Program will
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// cycle through the on-chip comparator_A reference voltages with output on
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// P1.1. Normal mode is LPM0, TA0_ISR will interrupt LPM0.
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// ACLK = n/a, MCLK = SMCLK = default DCO
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//
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// MSP430F20x1
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// -----------------
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// /|\| XIN|-
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// | | |
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// --|RST XOUT|-
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// | |
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// | P1.1/CA1|--> Vref
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// | |
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//
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// M. Buccini / L. Westlund
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// Texas Instruments Inc.
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// December 2005
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// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.40A
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//******************************************************************************
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#include <msp430.h>
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void delay(void); // Software delay
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int main (void)
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{
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WDTCTL = WDTPW + WDTHOLD; // Stop WDT
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CACTL2 = P2CA4; // CA1/P1.1 = +comp
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CCTL0 = CCIE; // CCR0 interrupt enabled
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TACTL = TASSEL_2 + ID_3 + MC_2; // SMCLK/8, cont-mode
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__enable_interrupt(); // enable interrupts
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while (1) // Loop
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{
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CACTL1 = 0x00; // No reference voltage
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__bis_SR_register(LPM0_bits); // Enter LPM0
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CACTL1 = CAREF0 + CAON; // 0.25*Vcc, Comp. on
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__bis_SR_register(LPM0_bits); // Enter LPM0
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CACTL1 = CAREF1 + CAON; // 0.5*Vcc, Comp. on
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__bis_SR_register(LPM0_bits); // Enter LPM0
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CACTL1 = CAREF1 + CAREF0 + CAON; // 0.55V, Comp. on
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__bis_SR_register(LPM0_bits); // Enter LPM0
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}
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}
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// Timer A0 interrupt service routine
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#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
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#pragma vector=TIMERA0_VECTOR
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__interrupt void Timer_A (void)
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#elif defined(__GNUC__)
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void __attribute__ ((interrupt(TIMERA0_VECTOR))) Timer_A (void)
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#else
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#error Compiler not supported!
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#endif
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{
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__bic_SR_register_on_exit(LPM0_bits); // Clear LPM0 bits from 0(SR)
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}
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