108 lines
5.7 KiB
Plaintext
Executable File
108 lines
5.7 KiB
Plaintext
Executable File
; --COPYRIGHT--,BSD_EX
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; Copyright (c) 2012, Texas Instruments Incorporated
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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;
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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;
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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;
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; * Neither the name of Texas Instruments Incorporated nor the names of
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; its contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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; ******************************************************************************
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;
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; MSP430 CODE EXAMPLE DISCLAIMER
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;
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; MSP430 code examples are self-contained low-level programs that typically
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; demonstrate a single peripheral function or device feature in a highly
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; concise manner. For this the code may rely on the device's power-on default
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; register values and settings such as the clock configuration and care must
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; be taken when combining code from several examples to avoid potential side
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; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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; for an API functional library-approach to peripheral configuration.
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;
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; --/COPYRIGHT--
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;*******************************************************************************
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; MSP430F20xx Demo - USI SPI Interface to HC165/164 Shift Registers
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;
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; Description: Demonstrate USI in two-way SPI mode. Data are read from
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; an HC165, and same data written back to the HC164.
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; ACLK = n/a MCLK = SMCLK = Default DCO, USI = SMCLK/2
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;
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; MSP430F20x2/3
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; -----------------
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; /|\| XIN|-
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; | | | ^ HC164
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; HC165 --|RST XOUT|- | -------------
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; ---------- | | |-|/CLR,B | 8
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; 8 | /LD|<---|P1.1 SIMO0/P1.6|------>|A Qx|--\->
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; -\->|A-H CLK|<---|P1.5/SCLK - P1.5|------>|CLK |
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; |-|INH QH|--->|P1.7/SOMI | | |
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; |-|SER | | | | |
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; - | | | | | |
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;
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; M.Buccini / L. Westlund
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; Texas Instruments, Inc
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; October 2005
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; Built with IAR Embedded Workbench Version: 3.40A
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;*******************************************************************************
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#include <msp430.h>
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;-------------------------------------------------------------------------------
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ORG 0F800h ; Program Reset
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;-------------------------------------------------------------------------------
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RESET mov.w #0280h,SP ; Initialize stackpointer
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StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
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SetupP1 bis.b #02h,&P1OUT ;
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bis.b #02h,&P1DIR ;
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SetupUSI bis.b #USIPE7+USIPE6+USIPE5+USIMST+USIOE,&USICTL0; Port, SPI master
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bis.b #USICKPH+USIIE,&USICTL1 ; Counter interrupt, flag remains
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mov.b #USIDIV_1+USISSEL_2,&USICKCTL ; /2 SMCLK
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bic.b #USISWRST,&USICTL0 ; Enable USI
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mov.b #08h,&USICNT ; init-load counter, clears flag
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;
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Mainloop call #RXTX_HC16x ; Exchange data
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Delay push.w #0 ; Software delay
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D1 dec.w 0(SP) ;
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jnz D1 ;
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incd.w SP ;
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jmp Mainloop ; Repeat
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;
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;-------------------------------------------------------------------------------
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RXTX_HC16x; HC165--> URXBUF0 UTXBUF0 --> HC164
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;-------------------------------------------------------------------------------
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TX0 bit.b #USIIFG,&USICTL1 ; USART0 TX buffer ready?
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jz TX0 ; Jump --> TX buffer not ready
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bic.b #02h,&P1OUT ; Latch data into 'HC165
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bis.b #02h,&P1OUT ;
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; ******************** ; Read data are ready to be written
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mov.b #08h,&USICNT ; Load counter, clears flag
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ret ; Return from subroutine
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;
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;-------------------------------------------------------------------------------
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; Interrupt Vectors Used
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;-------------------------------------------------------------------------------
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ORG 0FFFEh ; MSP430 RESET Vector
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DW RESET ;
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END
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