102 lines
5.1 KiB
Plaintext
Executable File
102 lines
5.1 KiB
Plaintext
Executable File
; --COPYRIGHT--,BSD_EX
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; Copyright (c) 2012, Texas Instruments Incorporated
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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;
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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;
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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;
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; * Neither the name of Texas Instruments Incorporated nor the names of
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; its contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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; ******************************************************************************
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;
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; MSP430 CODE EXAMPLE DISCLAIMER
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;
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; MSP430 code examples are self-contained low-level programs that typically
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; demonstrate a single peripheral function or device feature in a highly
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; concise manner. For this the code may rely on the device's power-on default
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; register values and settings such as the clock configuration and care must
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; be taken when combining code from several examples to avoid potential side
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; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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; for an API functional library-approach to peripheral configuration.
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;
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; --/COPYRIGHT--
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;*******************************************************************************
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; MSP430F20x1 Demo - Comp_A, Output Reference Voltages on P1.1
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;
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; Description: Output comparator_A reference levels on P1.1. Program will
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; cycle through the on-chip comparator_A reference voltages with output on
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; P1.1. Normal mode is LPM0 with TA0 triggering interrupt for next mode.
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; ACLK = n/a, MCLK = SMCLK = default DCO
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;
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; MSP430F20x1
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; -----------------
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; /|\| XIN|-
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; | | |
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; --|RST XOUT|-
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; | |
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; | CA1/P1.1|-->Vref
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; | |
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;
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; M. Buccini / L. Westlund
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; Texas Instruments Inc.
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; November 2005
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; Built with IAR Embedded Workbench Version: 3.40A
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;*******************************************************************************
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#include <msp430.h>
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;-------------------------------------------------------------------------------
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ORG 0F800h ; Program Reset
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;-------------------------------------------------------------------------------
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RESET mov.w #0280h,SP ; Initialize stackpointer
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StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
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mov.b #P2CA4,&CACTL2 ; CA1
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SetupC0 mov.w #CCIE,&CCTL0 ; CCR0 interrupt enabled
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SetupTA mov.w #TASSEL_2+ID_3+MC_2,&TACTL ; SMCLK/8, contmode
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eint ; General enable interrupts
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;
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Mainloop clr.b &CACTL1 ; No reference voltage
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bis.w #CPUOFF,SR ; CPU off
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Ref1 mov.b #CAREF0+CAON,&CACTL1 ; 0.25*Vcc, Comp. on
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bis.w #CPUOFF,SR ; CPU off
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Ref2 mov.b #CAREF1+CAON,&CACTL1 ; 0.5*Vcc, Comp. on
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bis.w #CPUOFF,SR ; CPU off
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Ref3 mov.b #CAREF1+CAREF0+CAON,&CACTL1 ; 0.55V on P2.3, Comp. on
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bis.w #CPUOFF,SR ; CPU off
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jmp Mainloop ;
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;-------------------------------------------------------------------------------
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TA0_ISR; Exit LPM0
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;-------------------------------------------------------------------------------
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bic.w #CPUOFF,0(SP) ; Exit LPM0 on RETI
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reti ;
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;
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;-------------------------------------------------------------------------------
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; Interrupt Vectors
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;-------------------------------------------------------------------------------
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ORG 0FFFEh ; MSP430 RESET Vector
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DW RESET ;
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ORG 0FFF2h ; Timer_A0 Vector
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DW TA0_ISR ;
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END
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