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Imants Pulkstenis
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/* --COPYRIGHT--,BSD_EX
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* Copyright (c) 2012, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************
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*
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* MSP430 CODE EXAMPLE DISCLAIMER
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*
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* MSP430 code examples are self-contained low-level programs that typically
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* demonstrate a single peripheral function or device feature in a highly
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* concise manner. For this the code may rely on the device's power-on default
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* register values and settings such as the clock configuration and care must
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* be taken when combining code from several examples to avoid potential side
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* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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* for an API functional library-approach to peripheral configuration.
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*
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* --/COPYRIGHT--*/
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//******************************************************************************
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// MSP430F20xx Demo - I2C Master Receiver, single byte
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//
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// Description: I2C Master communicates with I2C Slave using
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// the USI. Slave data should increment from 0x00 with each transmitted byte
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// which is verified by the Master.
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// LED off for address or data Ack; LED on for address or data NAck.
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// ACLK = n/a, MCLK = SMCLK = Calibrated 1MHz
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//
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// ***THIS IS THE MASTER CODE***
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//
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// Slave Master
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// (msp430x20x3_usi_09.c)
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// MSP430F20x2/3 MSP430F20x2/3
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// ----------------- -----------------
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// /|\| XIN|- /|\| XIN|-
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// | | | | | |
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// --|RST XOUT|- --|RST XOUT|-
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// | | | |
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// LED <-|P1.0 | | |
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// | | | P1.0|-> LED
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// | SDA/P1.7|------->|P1.7/SDA |
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// | SCL/P1.6|<-------|P1.6/SCL |
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//
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// Note: internal pull-ups are used in this example for SDA & SCL
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//
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// Z. Albus
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// Texas Instruments Inc.
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// May 2006
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// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.41A
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//******************************************************************************
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#include <msp430.h>
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char SLV_data = 0x00; // Variable for received data
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char SLV_Addr = 0x91; // Address is 0x48 << 1 bit + 1 for Read
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int I2C_State = 0; // State variable
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int main(void)
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{
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volatile unsigned int i; // Use volatile to prevent removal
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WDTCTL = WDTPW + WDTHOLD; // Stop watchdog
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if (CALBC1_1MHZ==0xFF) // If calibration constants erased
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{
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while(1); // do not load, trap CPU!!
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}
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DCOCTL = 0; // Select lowest DCOx and MODx settings
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BCSCTL1 = CALBC1_1MHZ; // Set DCO
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DCOCTL = CALDCO_1MHZ;
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P1OUT = 0xC0; // P1.6 & P1.7 Pullups
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P1REN |= 0xC0; // P1.6 & P1.7 Pullups
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P1DIR = 0xFF; // Unused pins as outputs
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P2OUT = 0;
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P2DIR = 0xFF;
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USICTL0 = USIPE6+USIPE7+USIMST+USISWRST;// Port & USI mode setup
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USICTL1 = USII2C+USIIE; // Enable I2C mode & USI interrupt
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USICKCTL = USIDIV_3+USISSEL_2+USICKPL;// Setup USI clocks: SCL = SMCLK/8 (~120kHz)
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USICNT |= USIIFGCC; // Disable automatic clear control
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USICTL0 &= ~USISWRST; // Enable USI
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USICTL1 &= ~USIIFG; // Clear pending flag
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__enable_interrupt();
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while(1)
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{
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USICTL1 |= USIIFG; // Set flag and start communication
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LPM0; // CPU off, await USI interrupt
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__no_operation(); // Used for IAR
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for (i = 0; i < 5000; i++); // Dummy delay between communication cycles
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}
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}
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/******************************************************
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// USI interrupt service routine
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******************************************************/
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#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
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#pragma vector = USI_VECTOR
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__interrupt void USI_TXRX (void)
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#elif defined(__GNUC__)
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void __attribute__ ((interrupt(USI_VECTOR))) USI_TXRX (void)
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#else
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#error Compiler not supported!
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#endif
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{
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switch(I2C_State)
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{
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case 0: // Generate Start Condition & send address to slave
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P1OUT |= 0x01; // LED on: sequence start
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USISRL = 0x00; // Generate Start Condition...
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USICTL0 |= USIGE+USIOE;
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USICTL0 &= ~USIGE;
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USISRL = SLV_Addr; // ... and transmit address, R/W = 1
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USICNT = (USICNT & 0xE0) + 0x08; // Bit counter = 8, TX Address
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I2C_State = 2; // Go to next state: receive address (N)Ack
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break;
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case 2: // Receive Address Ack/Nack bit
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USICTL0 &= ~USIOE; // SDA = input
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USICNT |= 0x01; // Bit counter = 1, receive (N)Ack bit
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I2C_State = 4; // Go to next state: check (N)Ack
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break;
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case 4: // Process Address Ack/Nack & handle data RX
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if (USISRL & 0x01) // If Nack received...
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{ // Prep Stop Condition
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USICTL0 |= USIOE;
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USISRL = 0x00;
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USICNT |= 0x01; // Bit counter = 1, SCL high, SDA low
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I2C_State = 10; // Go to next state: generate Stop
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P1OUT |= 0x01; // Turn on LED: error
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}
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else // Ack received
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{ // Receive Data from slave
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USICNT |= 0x08; // Bit counter = 8, RX data
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I2C_State = 6; // Go to next state: Test data and (N)Ack
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P1OUT &= ~0x01; // LED off
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}
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break;
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case 6: // Send Data Ack/Nack bit
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USICTL0 |= USIOE; // SDA = output
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if (USISRL == SLV_data) // If data valid...
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{
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USISRL = 0x00; // Send Ack
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SLV_data++; // Increment Slave data
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P1OUT &= ~0x01; // LED off
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}
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else
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{
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USISRL = 0xFF; // Send NAck
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P1OUT |= 0x01; // LED on: error
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}
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USICNT |= 0x01; // Bit counter = 1, send (N)Ack bit
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I2C_State = 8; // Go to next state: prep stop
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break;
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case 8: // Prep Stop Condition
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USICTL0 |= USIOE; // SDA = output
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USISRL = 0x00;
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USICNT |= 0x01; // Bit counter = 1, SCL high, SDA low
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I2C_State = 10; // Go to next state: generate Stop
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break;
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case 10: // Generate Stop Condition
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USISRL = 0x0FF; // USISRL = 1 to release SDA
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USICTL0 |= USIGE; // Transparent latch enabled
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USICTL0 &= ~(USIGE+USIOE);// Latch/SDA output disabled
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I2C_State = 0; // Reset state machine for next transmission
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LPM0_EXIT; // Exit active for next transfer
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break;
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}
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USICTL1 &= ~USIIFG; // Clear pending flag
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}
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