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+; --COPYRIGHT--,BSD_EX
+;  Copyright (c) 2012, Texas Instruments Incorporated
+;  All rights reserved.
+; 
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+; 
+;  *  Redistributions of source code must retain the above copyright
+;     notice, this list of conditions and the following disclaimer.
+; 
+;  *  Redistributions in binary form must reproduce the above copyright
+;     notice, this list of conditions and the following disclaimer in the
+;     documentation and/or other materials provided with the distribution.
+; 
+;  *  Neither the name of Texas Instruments Incorporated nor the names of
+;     its contributors may be used to endorse or promote products derived
+;     from this software without specific prior written permission.
+; 
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+;  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+;  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+;  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+;  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+;  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+;  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; 
+; ******************************************************************************
+;  
+;                        MSP430 CODE EXAMPLE DISCLAIMER
+; 
+;  MSP430 code examples are self-contained low-level programs that typically
+;  demonstrate a single peripheral function or device feature in a highly
+;  concise manner. For this the code may rely on the device's power-on default
+;  register values and settings such as the clock configuration and care must
+;  be taken when combining code from several examples to avoid potential side
+;  effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
+;  for an API functional library-approach to peripheral configuration.
+; 
+; --/COPYRIGHT--
+;*******************************************************************************
+;   MSP430F20xx Demo - Reset on Invalid Address fetch, Toggle P1.0
+;
+;   Description: Toggle P1.0 by xor'ing P1.0 inside of a software loop that
+;   ends with TAR loaded with 3FFFh - op-code for "jmp $" This simulates a code
+;   error. The MSP430F2xx will force a reset because it will not allow a fetch
+;   from within the address range of the peripheral memory, as is seen by
+;   return to the mainloop and LED flash.
+;   In contrast, an MSP430F1xx device will "jmp $" stopping code execution with
+;   no LED flash.
+;   ACLK = n/a, MCLK = SMCLK = default DCO
+;
+;                MSP430F20xx
+;             -----------------
+;         /|\|              XIN|-
+;          | |                 |
+;          --|RST          XOUT|-
+;            |                 |
+;            |             P1.0|-->LED
+;
+;   M. Buccini / L. Westlund
+;   Texas Instruments, Inc
+;   October 2005
+;   Built with IAR Embedded Workbench Version: 3.40A
+;*******************************************************************************
+#include <msp430.h>
+;-------------------------------------------------------------------------------
+            ORG     0F800h                  ; Program Reset
+;-------------------------------------------------------------------------------
+RESET       mov.w   #0280h,SP               ; Initialize stackpointer
+StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
+SetupP1     bis.b   #001h,&P1DIR            ; P1.0 output
+            mov.w   #03FFFh,&TAR            ; "jmp $"
+                                            ;				
+Mainloop    xor.b   #001h,&P1OUT            ; Toggle P1.0
+Wait        mov.w   #050000,R15             ; Delay to R15
+L1          dec.w   R15                     ; Decrement R15
+            jnz     L1                      ; Delay over?
+            mov     #0170h,PC               ; Invalid fetch
+            jmp     Mainloop                ; Again
+                                            ;
+;-------------------------------------------------------------------------------
+;           Interrupt Vectors Used MSP430
+;-------------------------------------------------------------------------------
+            ORG     0FFFEh                  ; MSP430 RESET Vector
+            DW      RESET                   ;
+            END