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Imants Pulkstenis
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; --COPYRIGHT--,BSD_EX
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; Copyright (c) 2012, Texas Instruments Incorporated
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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;
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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;
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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;
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; * Neither the name of Texas Instruments Incorporated nor the names of
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; its contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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; ******************************************************************************
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;
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; MSP430 CODE EXAMPLE DISCLAIMER
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;
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; MSP430 code examples are self-contained low-level programs that typically
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; demonstrate a single peripheral function or device feature in a highly
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; concise manner. For this the code may rely on the device's power-on default
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; register values and settings such as the clock configuration and care must
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; be taken when combining code from several examples to avoid potential side
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; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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; for an API functional library-approach to peripheral configuration.
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;
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; --/COPYRIGHT--
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;*******************************************************************************
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; MSP430F20xx Demo - Flash In-System Programming, Copy SegC to SegD
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;
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; Description: This program first erases flash seg C, then it increments all
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; values in seg C, then it erases seg C, then copies seg C to seg D.
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; Assumed MCLK 771kHz - 1428kHz.
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; //* Set Breakpoint in the Mainloop to avoid Stressing Flash *//
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;
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; MSP430F20xx
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; -----------------
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; /|\| XIN|-
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; | | |
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; --|RST XOUT|-
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; | |
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;
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#define value R4
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;
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; M. Buccini / L. Westlund
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; Texas Instruments Inc.
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; December 2005
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; Built with IAR Embedded Workbench Version: 3.40A
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;*******************************************************************************
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#include <msp430.h>
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;-------------------------------------------------------------------------------
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ORG 0F800h ; Program Reset
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;-------------------------------------------------------------------------------
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RESET mov.w #0280h,SP ; Initialize stackpointer
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StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
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CheckCal cmp.b #0xFF,&CALBC1_1MHZ ; Check calibration constants
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jne Load ; if not erased, load.
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Trap jmp Trap ; if erased do not load, trap CPU!
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Load clr.b &DCOCTL ; Select lowest DCOx and MODx settings
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mov.b &CALBC1_1MHZ,&BCSCTL1 ; Set DCO to 1MHz
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mov.b &CALDCO_1MHZ,&DCOCTL
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clr.b value ; value = value to write to flash
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;
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Mainloop call #Write_SegC ; Copy value to segment C
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inc.b value ;
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call #CopyC2D ;
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jmp Mainloop ; Repeat,SET BREAKPOINT HERE
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;
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;-------------------------------------------------------------------------------
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Write_SegC ;Input = value, holds value to write to Seg C, R5 used as working reg.
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;-------------------------------------------------------------------------------
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mov.w #01040h,R5 ;
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Timing mov.w #FWKEY+FSSEL0+FN1,&FCTL2 ; *Timing generator = MCLK/3
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Erase_SegC mov.w #FWKEY,&FCTL3 ; Lock = 0
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mov.w #FWKEY+ERASE,&FCTL1 ; Erase bit = 1, allow interrupts
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mov.w #0,&01040h ; Dummy write to SegC to erase
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Prog_SegC mov.w #FWKEY+WRT,&FCTL1 ; Write bit = 1, block interrupts
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mov.w #FWKEY,&FCTL3 ; Lock = 0
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Prog_L1 mov.b value,0(R5) ;
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inc.w R5 ;
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cmp.w #01080h,R5 ;
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jne Prog_L1 ;
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mov.w #FWKEY+LOCK,&FCTL3 ; Lock = 1;
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ret ;
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;
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;-------------------------------------------------------------------------------
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CopyC2D ;Copy Seg C to Seg D, R5 used as working reg.
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;-------------------------------------------------------------------------------
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mov.w #FWKEY+FSSEL0+FN1,&FCTL2 ; *Timing generator = MCLK/3
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Erase_SegD mov.w #FWKEY,&FCTL3 ; Lock = 0
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mov.w #FWKEY+ERASE,&FCTL1 ; Erase bit = 1
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mov.w #0,&01000h ; Dummy write to SegD to erase
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mov.w #01040h,R5 ; R5 = First byte in Seg C
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Prog_SegD mov.w #FWKEY+WRT,&FCTL1 ; Write bit = 1, block interrupts
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mov.w #FWKEY,&FCTL3 ; Lock = 0
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Prog_L2 mov.b @R5+,-65(R5) ; Copy Seg C to Seg D
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cmp.w #01080h,R5 ;
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jne Prog_L2 ;
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mov.w #FWKEY+LOCK,&FCTL3 ; Lock = 1
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ret
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;-------------------------------------------------------------------------------
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; Interrupt Vectors
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;-------------------------------------------------------------------------------
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ORG 0FFFEh ; MSP430 RESET Vector
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DW RESET ;
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END
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