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Imants Pulkstenis
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; --COPYRIGHT--,BSD_EX
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; Copyright (c) 2012, Texas Instruments Incorporated
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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;
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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;
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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;
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; * Neither the name of Texas Instruments Incorporated nor the names of
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; its contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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; ******************************************************************************
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;
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; MSP430 CODE EXAMPLE DISCLAIMER
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;
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; MSP430 code examples are self-contained low-level programs that typically
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; demonstrate a single peripheral function or device feature in a highly
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; concise manner. For this the code may rely on the device's power-on default
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; register values and settings such as the clock configuration and care must
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; be taken when combining code from several examples to avoid potential side
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; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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; for an API functional library-approach to peripheral configuration.
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;
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; --/COPYRIGHT--
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;*******************************************************************************
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; MSP430F20xx Demo - DCO Calibration Constants Programmer
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;
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; NOTE: THIS CODE REPLACES THE TI FACTORY-PROGRAMMED DCO CALIBRATION
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; CONSTANTS LOCATED IN INFOA WITH NEW VALUES. USE ONLY IF THE ORIGINAL
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; CONSTANTS WERE ACCIDENTALLY CORRUPTED OR ERASED.
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;
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; Description: This code re-programs the F20xx DCO calibration constants.
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; A software FLL mechanism is used to set the DCO based on an external
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; 32kHz reference clock. After each calibration, the values from the
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; clock system are read out and stored in a temporary variable. The final
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; frequency the DCO is set to is 1MHz, and this frequency is also used
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; during Flash programming of the constants. The program end is indicated
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; by the blinking LED.
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; ACLK = LFXT1/8 = 32768/8, MCLK = SMCLK = target DCO
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; //* External watch crystal installed on XIN XOUT is required for ACLK *//
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;
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; MSP430F20xx
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; ---------------
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; /|\| XIN|-
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; | | | 32kHz
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; --|RST XOUT|-
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; | |
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; | P1.0|--> LED
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; | P1.4|--> SMLCK = target DCO
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;
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; P. Thanigai
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; Texas Instruments Inc.
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; July 2007
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; Built with Code Composer Essentials Version: 2.0
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;*******************************************************************************
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.cdecls C,LIST, "msp430.h"
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;-------------------------------------------------------------------------------
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.def RESET ; Export program entry-point to
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; make it known to linker.
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;-------------------------------------------------------------------------------
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DELTA_1MHZ .EQU 244 ; 244 x 4096Hz = 999.4Hz
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DELTA_8MHZ .EQU 1953 ; 1953 x 4096Hz = 7.99MHz
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DELTA_12MHZ .EQU 2930 ; 2930 x 4096Hz = 12.00MHz
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DELTA_16MHZ .EQU 3906 ; 3906 x 4096Hz = 15.99MHz
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;-------------------------------------------------------------------------------
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.data ; RAM variables
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;------------------------------------------------------------------------------
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.bss Const1,1 ; Temp. storage for constants
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.bss Const2,1
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.bss Const3,1
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.bss Const4,1
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.bss Const5,1
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.bss Const6,1
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.bss Const7,1
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.bss Const8,1
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;------------------------------------------------------------------------------
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.text ; Progam Start
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;------------------------------------------------------------------------------
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RESET mov.w #0280h,SP ; Initialize stackpointer
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StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
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push.w #0ffffh ; LFXT1 startup delay
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OscDelay dec.w 0(SP) ; Do calc on the stack
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jnz OscDelay ;
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incd.w SP ; Correct SP
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SetupP1 clr.b &P1OUT ; Clear P1 output latches
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mov.b #010h,&P1SEL ; P1.4 SMCLK output
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mov.b #011h,&P1DIR ; P1.0,4 output
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;
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Main mov.w #DELTA_16MHZ,R12 ; Set DCO and obtain constants
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call #Set_DCO ;
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mov.b &DCOCTL,&Const1 ;
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mov.b &BCSCTL1,&Const2 ;
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mov.w #DELTA_12MHZ,R12 ; Set DCO and obtain constants
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call #Set_DCO ;
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mov.b &DCOCTL,&Const3 ;
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mov.b &BCSCTL1,&Const4 ;
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mov.w #DELTA_8MHZ,R12 ; Set DCO and obtain constants
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call #Set_DCO ;
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mov.b &DCOCTL,&Const5 ;
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mov.b &BCSCTL1,&Const6 ;
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mov.w #DELTA_1MHZ,R12 ; Set DCO and obtain constants
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call #Set_DCO ;
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mov.b &DCOCTL,&Const7 ;
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mov.b &BCSCTL1,&Const8 ;
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;
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mov.w #FWKEY+FSSEL0+FN1,&FCTL2; MCLK/3 for Flash Timing Generator
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mov.w #FWKEY+ERASE,&FCTL1 ; Set Erase bit
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mov.w #FWKEY+LOCKA,&FCTL3 ; Clear LOCK & LOCKA bits
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mov.w #0,&010c0h ; Dummy write to erase Flash seg A
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mov.w #FWKEY+WRT,&FCTL1 ; Set WRT bit for write operation
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mov.b &Const1,&010f8h ; re-flash DCO calibration data
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mov.b &Const2,&010f9h ; re-flash DCO calibration data
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mov.b &Const3,&010fah ; re-flash DCO calibration data
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mov.b &Const4,&010fbh ; re-flash DCO calibration data
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mov.b &Const5,&010fch ; re-flash DCO calibration data
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mov.b &Const6,&010fdh ; re-flash DCO calibration data
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mov.b &Const7,&010feh ; re-flash DCO calibration data
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mov.b &Const8,&010ffh ; re-flash DCO calibration data
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mov.w #FWKEY,&FCTL1 ; Clear WRT bit
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mov.w #FWKEY+LOCKA+LOCK,&FCTL3; Set LOCK & LOCKA bit
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;
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Mainloop xor.b #001h,&P1OUT ; Toggle LED
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push.w #20000 ; Delay to TOS
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Delay dec.w 0(SP) ; Decrement TOS
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jnz Delay ; Delay over?
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incd.w SP ; Clean stack
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jmp Mainloop ;
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;
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;-------------------------------------------------------------------------------
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Set_DCO; Subroutine: Sets DCO to selected frequency based on Delta (R12).
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; R13, R14, and R15 are used, ACLK= 32768/8 Timer_A clocked by DCOCLK
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;-------------------------------------------------------------------------------
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bis.b #DIVA_3,&BCSCTL1 ; ACLK = LFXT1CLK/8
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clr.w R15 ;
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Setup_CC2 mov.w #CM_1+CCIS_1+CAP,&TACCTL0 ; CAP, ACLK
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Setup_TA mov.w #TASSEL_2+MC_2+TACLR,&TACTL ; SMCLK, Continous Mode, clear
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Test_DCO bit.w #CCIFG,&TACCTL0 ; Test capture flag
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jz Test_DCO ;
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bic.w #CCIFG,&TACCTL0 ; Clear capture flag
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;
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AdjDCO mov.w &TACCR0,R14 ; R14 = captured SMCLK
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sub.w R15,R14 ; R14 = capture difference
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mov.w &TACCR0,R15 ; R15 = captured SMCLK
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cmp.w R12,R14 ; Delta (R12) = SMCLK/(32768/4)
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jlo IncDCO ;
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jeq DoneDCO ;
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DecDCO dec.b &DCOCTL ; Slow DCO with DCO and MOD
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jc Test_DCO ; Slower?
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bit.b #00fh,&BCSCTL1 ; Can RSELx be decremented
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jnc Test_DCO ; No
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dec.b &BCSCTL1 ; Decrement RSEL.x
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jmp Test_DCO ;
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IncDCO inc.b &DCOCTL ; Speed DCO with DCO and MOD
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jnc Test_DCO ; Faster?
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mov.b &BCSCTL1,R13 ; Can RSEL.x be increased?
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and.b #00fh,R13 ;
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cmp.b #00fh,R13 ;
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jz Test_DCO ; No
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inc.b &BCSCTL1 ; Increment RSEL.x
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jmp Test_DCO ;
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DoneDCO clr.w &TACCTL0 ; Stop TACCR0
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clr.w &TACTL ; Stop Timer_A
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bic.b #DIVA_3,&BCSCTL1 ; ACLK = LFXT1CLK
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ret ; Return from subroutine
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;
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;------------------------------------------------------------------------------
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; Interrupt Vectors
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;------------------------------------------------------------------------------
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.sect ".reset" ; MSP430 RESET Vector
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.short RESET ;
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.end
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