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+; --COPYRIGHT--,BSD_EX
+;  Copyright (c) 2012, Texas Instruments Incorporated
+;  All rights reserved.
+; 
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+; 
+;  *  Redistributions of source code must retain the above copyright
+;     notice, this list of conditions and the following disclaimer.
+; 
+;  *  Redistributions in binary form must reproduce the above copyright
+;     notice, this list of conditions and the following disclaimer in the
+;     documentation and/or other materials provided with the distribution.
+; 
+;  *  Neither the name of Texas Instruments Incorporated nor the names of
+;     its contributors may be used to endorse or promote products derived
+;     from this software without specific prior written permission.
+; 
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+;  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+;  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+;  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+;  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+;  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+;  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; 
+; ******************************************************************************
+;  
+;                        MSP430 CODE EXAMPLE DISCLAIMER
+; 
+;  MSP430 code examples are self-contained low-level programs that typically
+;  demonstrate a single peripheral function or device feature in a highly
+;  concise manner. For this the code may rely on the device's power-on default
+;  register values and settings such as the clock configuration and care must
+;  be taken when combining code from several examples to avoid potential side
+;  effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
+;  for an API functional library-approach to peripheral configuration.
+; 
+; --/COPYRIGHT--
+;*******************************************************************************
+;   MSP430F20xx Demo - Basic Clock, Configure RST/NMI as NMI
+;
+;   Description: Configure RST/NMI as NMI, hi/lo edge. Flash P1.0  inside of
+;   NMI_ISR if NMI occurs. General enable interrupt in status register does
+;   not need to be set for NMI. NMIIE does need to be reset, as NMI_ISR
+;   automatically clears NMI enable to prevent unintentional stack overflow
+;   that could result from, bounce or uncontrolled NMI's.
+;   ACLK = n/a, MCLK = SMCLK = Default DCO
+;
+;                MSP430F20xx
+;             -----------------
+;         /|\|              XIN|-
+;          | |                 |
+;          --|RST          XOUT|-
+;            |                 |
+;
+;   P.Thanigai
+;   Texas Instruments Inc.
+;   May 2007
+;   Built with Code Composer Essentials Version: 2.0
+;*******************************************************************************
+ .cdecls C,LIST,  "msp430.h"
+;-------------------------------------------------------------------------------
+            .def    RESET                   ; Export program entry-point to
+                                            ; make it known to linker.
+
+;------------------------------------------------------------------------------
+            .text                           ; Progam Start
+;------------------------------------------------------------------------------
+RESET       mov.w   #0280h,SP               ; Initialize stackpointer
+SetupWDT    mov.w   #WDTPW+WDTHOLD+WDTNMI+WDTNMIES,&WDTCTL  ; WDT off NMI hi/lo
+            bis.b   #01h,&P1DIR             ; P1.0 = output
+            bic.b   #01h,&P1OUT             ; P1.0 = reset
+            bis.b   #NMIIE,&IE1             ; Enable NMI
+                                            ;
+Mainloop    jmp     Mainloop                ; Endless Loop
+                                            ;
+;-------------------------------------------------------------------------------
+NMI_ISR   ; Flash P1.0
+;-------------------------------------------------------------------------------
+            bis.b   #01h,&P1OUT             ; P1.0 = set
+Wait        push.w  #020000                 ; Delay value --> TOS
+Wait1       dec.w   0(SP)                   ; Decrement TOS
+            jnz	    Wait1                   ; Delay over?
+            incd.w  SP                      ; Clean up stack
+            bic.b   #01h,&P1OUT             ; P1.0 = reset
+            bic.b   #NMIIFG,&IFG1           ; reclear NMI flag in case bounce
+            bis.b   #NMIIE,&IE1             ; Re-enable NMI interrupt
+            reti                            ; Done
+                                            ;
+;-----------------------------------------------------------------------------
+;           Interrupt Vectors
+;-----------------------------------------------------------------------------
+            .sect   ".int14"                ; NMI vector
+            .short  NMI_ISR                 ;
+            .sect   ".reset"                ; MSP430 RESET Vector
+            .short  RESET                   ;
+            .end