imants/FPGA-Mandelbrot-Set
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Imants Pulkstenis 37f46b5044 Initial file upload
2019-07-12 12:19:06 +03:00
7segment_tb.v
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7segment.v
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Basys3_Master.xdc
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blockram.v
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clock_divider_param_tb.v
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clock_divider_param.v
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clock_enable_param.v
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clock_enable_tb.v
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com_to_mem_FSM_hex.v
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com_to_mem_module.v
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com_to_mem_tb.v
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debounce_switch.v
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horizontal_counter.v
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pattern_gen_tb.v
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pattern_gen.v
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README.md
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top_tb.v
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top.v
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UART_Loopback_module.v
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UART_Loopback_tb.v
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UART_RX.v
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UART_TX.v
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vertical_counter.v
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vga_module.v
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README.md

FPGA-Mandelbrot-Set (Not finished)

Mandelbrot set visualization

picture

I will try make Cornell University ECE 5760: Laboratory 3 Mandelbrot set visualization. http://people.ece.cornell.edu/land/courses/ece5760/LABS/s2019/lab3_mandelbrot.html

Lectures:

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Description
Mandelbrot set visualization
Readme
57 KiB
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Verilog 83.3%
Tcl 13.8%
MATLAB 2.9%