Signal generators are working. Tested on TestBench

2020-06-08 20:45:20 +03:00
parent 9c73fa1193
commit af6516eb85
8 changed files with 885 additions and 6 deletions
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+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, the Altera Quartus II License Agreement,
+# the Altera MegaCore Function License Agreement, or other 
+# applicable license agreement, including, without limitation, 
+# that your use is for the sole purpose of programming logic 
+# devices manufactured by Altera and sold by Altera or its 
+# authorized distributors.  Please refer to the applicable 
+# agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 64-Bit
+# Version 15.0.0 Build 145 04/22/2015 SJ Web Edition
+# Date created = 22:16:23  March 21, 2018
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "15.0"
+DATE = "22:16:23  March 21, 2018"
+
+# Revisions
+
+PROJECT_REVISION = "dds_vhdl"