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;                        MSP430 CODE EXAMPLE DISCLAIMER
; 
;  MSP430 code examples are self-contained low-level programs that typically
;  demonstrate a single peripheral function or device feature in a highly
;  concise manner. For this the code may rely on the device's power-on default
;  register values and settings such as the clock configuration and care must
;  be taken when combining code from several examples to avoid potential side
;  effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
;  for an API functional library-approach to peripheral configuration.
; 
; --/COPYRIGHT--
;*******************************************************************************
;   MSP430F20x2/3 Demo - USI SPI Interface to TLC549 8-bit ADC
;
;   Description: This program demonstrate a USI in SPI mode interface to a
;   TLC549 8-bit ADC. If AIN > 0.5(REF+ - REF-), P1.0 set, else reset.
;   ACLK = n/a, MCLK = SMCLK = default DCO, UCICLK = SMCLK/4
;   //** VCC must be at least 3v for TLC549 **//
;
;                          MSP430F20x2/3
;                       -----------------
;                   /|\|              XIN|-
;        TLC549      | |                 |
;    -------------   --|RST          XOUT|-
;   |           CS|<---|P1.1             |
;   |      DATAOUT|--->|P1.7/SOMI    P1.0|-->LED
; ~>|AIN   I/O CLK|<---|P1.5/UCLK0       |
;
;   M.Buccini / L. Westlund
;   Texas Instruments, Inc
;   October 2005
;   Built with IAR Embedded Workbench Version: 3.40A
;*******************************************************************************
#include <msp430.h>
;-------------------------------------------------------------------------------
            ORG     0F800h                  ; Program Reset
;-------------------------------------------------------------------------------
RESET       mov.w   #0280h,SP               ; Initialize stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop watchdog timer
SetupP1     clr.b   &P1OUT                  ;
            bis.b   #03h,&P1DIR             ; P1.0/1 output direction

SetupUSI    bis.b   #USIPE7+USIPE5+USIMST+USIOE,&USICTL0; Port, SPI master
            bis.b   #USIIE,&USICTL1         ; Counter interrupt, flag remains
            mov.b   #USIDIV_2+USISSEL_2,&USICKCTL    ; /4 SMCLK
            bic.b   #USISWRST,&USICTL0      ; Enable USI
            mov.b   #08h,&USICNT            ; init-load counter, clears flag
                                            ;
Mainloop    bis.w   #LPM0+GIE,SR            ; Enter LPM0, enable interrupts
            jmp     Mainloop                ; Again
                                            ;
;-------------------------------------------------------------------------------
USI_ISR  ;
;-------------------------------------------------------------------------------
            bis.b   #02h,&P1OUT             ; Disable TLC549
            cmp.b   #07Fh,&USISRL           ;
            bic.b   #01h,&P1OUT             ;
            jlo     USI_ISR1                ;
            bis.b   #01h,&P1OUT             ;
USI_ISR1    bic.b   #02h,&P1OUT             ; Enable TLC549
            mov.b   #08h,&USICNT            ; re-load counter
            reti                            ;
                                            ;
;-------------------------------------------------------------------------------
;           Interrupt Vectors Used MSP430x2013
;-------------------------------------------------------------------------------
            ORG     0FFFEh                  ; MSP430 RESET Vector
            DW      RESET                   ;
            ORG     0FFE8h                  ; USICNT
            DW      USI_ISR                 ;
            END