; --COPYRIGHT--,BSD_EX ; Copyright (c) 2012, Texas Instruments Incorporated ; All rights reserved. ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions ; are met: ; ; * Redistributions of source code must retain the above copyright ; notice, this list of conditions and the following disclaimer. ; ; * Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. ; ; * Neither the name of Texas Instruments Incorporated nor the names of ; its contributors may be used to endorse or promote products derived ; from this software without specific prior written permission. ; ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; ; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, ; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR ; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, ; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ; ****************************************************************************** ; ; MSP430 CODE EXAMPLE DISCLAIMER ; ; MSP430 code examples are self-contained low-level programs that typically ; demonstrate a single peripheral function or device feature in a highly ; concise manner. For this the code may rely on the device's power-on default ; register values and settings such as the clock configuration and care must ; be taken when combining code from several examples to avoid potential side ; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware ; for an API functional library-approach to peripheral configuration. ; ; --/COPYRIGHT-- ;******************************************************************************* ; MSP430F20xx Demo - Timer_A, Toggle P1.0-2, Cont. Mode ISR, 32kHz ACLK ; ; Description: Use Timer_A CCRx units and overflow to generate four ; independent timing intervals. For demonstration, CCR0 and CCR2 ; output units are optionally selected with port pins P1.1 and P1.2 ; in toggle mode. As such, these pins will toggle when respective CCRx ; registers match the TAR counter. Interrupts are also enabled with all ; CCRx units, software loads offset to next interval only - as long as the ; interval offset is added to CCRx, toggle rate is generated in hardware. ; Timer_A overflow ISR is used to toggle P1.0 with software. Proper use ; of the TAIV interrupt vector generator is demonstrated. ; ACLK = TACLK = 32kHz, MCLK = SMCLK = default DCO ; //* An external watch crystal on XIN XOUT is required for ACLK *// ; ; As coded and with TACLK = 32768Hz, toggle rates are: ; P1.1= CCR0 = 32768/(2*4) = 4096Hz ; P1.2= CCR1 = 32768/(2*16) = 1024Hz ; P1.0= overflow = 32768/(2*65536) = 0.25Hz ; ; MSP430F20xx ; ----------------- ; /|\| XIN|- ; | | | 32kHz ; --|RST XOUT|- ; | | ; | P1.1/TA0|--> CCR0 ; | P1.2/TA1|--> CCR1 ; | P1.0|--> Overflow/software ; ; M. Buccini / L. Westlund ; Texas Instruments Inc. ; October 2005 ; Built with IAR Embedded Workbench Version: 3.40A ;******************************************************************************* #include ;------------------------------------------------------------------------------- ORG 0F800h ; Program Reset ;------------------------------------------------------------------------------- RESET mov.w #0280h,SP ; Initialize stackpointer StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT SetupP1 bis.b #006h,&P1SEL ; P1.1 - P1.2 option select bis.b #007h,&P1DIR ; P1.0-2 outputs SetupC0 mov.w #OUTMOD_4 +CCIE,&CCTL0 ; CCR0 toggle, interrupt enabled SetupC1 mov.w #OUTMOD_4 +CCIE,&CCTL1 ; CCR1 toggle, interrupt enabled SetupTA mov.w #TASSEL_1+MC_2+TAIE,&TACTL ; ACLK, contmode, interrupt ; Mainloop bis.w #LPM3+GIE,SR ; Enter LPM3, interrupts enabled nop ; Required for debug ; ;------------------------------------------------------------------------------- TA0_ISR; ;------------------------------------------------------------------------------- add.w #4,&CCR0 ; Offset until next interrupt reti ; ; ;------------------------------------------------------------------------------- TAX_ISR; Common ISR for CCR1-4 and overflow ;------------------------------------------------------------------------------- add.w &TAIV,PC ; Add Timer_A offset vector reti ; CCR0 - no source jmp CCR1_ISR ; CCR1 reti ; CCR2 reti ; CCR3 reti ; CCR4 TA_over xor.b #001h,&P1OUT ; Toggle P1.0 reti ; Return from overflow ISR ; CCR1_ISR add.w #16,&CCR1 ; Offset until next interrupt reti ; Return ISR ; ;------------------------------------------------------------------------------- ; Interrupt Vectors ;------------------------------------------------------------------------------- ORG 0FFFEh ; MSP430 RESET Vector DW RESET ; ORG 0FFF2h ; Timer_A0 Vector DW TA0_ISR ; ORG 0FFF0h ; Timer_AX Vector DW TAX_ISR ; END