43 lines
1.1 KiB
Verilog
43 lines
1.1 KiB
Verilog
////////////////////////////////////////////////////////////////////
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//
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// This module alow to baypass mechanical swiches to
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// imag_procesor module or automaticly selects
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// and changes operation and camera select mode
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//
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//////////////////////////////////////////////////////////////////
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module mode_selector#( parameter
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LIMIT = 2_0000_0000
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//counter limit when it shoud change mode
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// 100MHz -> period is 10ns
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// 5s cycle period result in
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// limit 5/(10*10^-9)= 500*10^6
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)(
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input clk,
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// input i_enable,
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input [8:0] i_im_p,
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input autoselect,
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output [8:0] o_im_p
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);
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reg [31:0] counter = 0;
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reg [5:0] mode = 0; // camera modes
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reg [2:0] color = 0; // color modes
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reg [1:0] display = 0; // swiching between cameras
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always@(posedge clk) begin
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if (counter < LIMIT) begin
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counter = counter + 1;
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end
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else begin
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counter = 0;
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mode = mode + 1;
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color = color + 1;
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display = display + 1;
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end
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end
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assign o_im_p = autoselect ? {color[2:1],mode[5:2],1'b0,display}
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: i_im_p;
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endmodule |