38 lines
2.4 KiB
Tcl
38 lines
2.4 KiB
Tcl
# fpga4student.com: FPGA projects, Verilog projects, VHDL projects
|
|
# FPGA tutorial: How to interface a mouse with Basys 3 FPGA
|
|
# Verilog code for interfacing a mouse with the Basys 3 FPGA board
|
|
##USB HID (PS/2)
|
|
set_property PACKAGE_PIN C17 [get_ports Mouse_Clk]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports Mouse_Clk]
|
|
set_property PULLUP true [get_ports Mouse_Clk]
|
|
set_property PACKAGE_PIN B17 [get_ports Mouse_Data]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports Mouse_Data]
|
|
set_property PULLUP true [get_ports Mouse_Data]
|
|
# Clock signal
|
|
set_property PACKAGE_PIN W5 [get_ports clock_100Mhz]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports clock_100Mhz]
|
|
set_property PACKAGE_PIN R2 [get_ports reset]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports reset]
|
|
#seven-segment LED display
|
|
set_property PACKAGE_PIN W7 [get_ports {LED_out[6]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {LED_out[6]}]
|
|
set_property PACKAGE_PIN W6 [get_ports {LED_out[5]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {LED_out[5]}]
|
|
set_property PACKAGE_PIN U8 [get_ports {LED_out[4]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {LED_out[4]}]
|
|
set_property PACKAGE_PIN V8 [get_ports {LED_out[3]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {LED_out[3]}]
|
|
set_property PACKAGE_PIN U5 [get_ports {LED_out[2]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {LED_out[2]}]
|
|
set_property PACKAGE_PIN V5 [get_ports {LED_out[1]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {LED_out[1]}]
|
|
set_property PACKAGE_PIN U7 [get_ports {LED_out[0]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {LED_out[0]}]
|
|
set_property PACKAGE_PIN U2 [get_ports {Anode_Activate[0]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {Anode_Activate[0]}]
|
|
set_property PACKAGE_PIN U4 [get_ports {Anode_Activate[1]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {Anode_Activate[1]}]
|
|
set_property PACKAGE_PIN V4 [get_ports {Anode_Activate[2]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {Anode_Activate[2]}]
|
|
set_property PACKAGE_PIN W4 [get_ports {Anode_Activate[3]}]
|
|
set_property IOSTANDARD LVCMOS33 [get_ports {Anode_Activate[3]}] |